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Perceptia Second-Generation Digital PLL IP Enters Mass Production
November 29, 2018 -- Morgan Hill, California—Perceptia Devices, Inc., a developer of innovative PLL and timing technology, today announced that its flagship high-end second-generation digital PLL has entered mass production in UMC's 40LP foundry process. The IP, dubbed pPLL08-5G, targets a performance point not achieved in conventional analog PLL, or even a first-generation digital PLL. At a modest power level of 70mW it supports rms jitter of 300 femtoseconds, measured over a band from 6kHz to 700MHz. This performance makes it suitable for the most critical applications, including 5G base stations. The lead customer for the IP plans actual shipments early 2019.
Perceptia started designing first-generation all-digital PLLs 10 years ago. It has delivered numerous custom projects bringing the technology to a range of applications, many of which targeted higher performance and/or lower power. Perceptia has incorporated a series of innovations to achieve higher performance and lower power into its second-generation digital PLL architecture. As a result, most of the signal loop can now be implemented with synthesized synchronous logic. Only the digitally-controlled oscillator (DCO) and a time-to-digital (TDC) circuit in the feedback block remain mixed-signal. The architecture is configurable and programmable. This allows migration efforts to be fully focused on optimization of the DCO for an application, or range of applications.
Second-Generation Digital Fractional-N PLL for 5G Applications ![]() Second-Generation Digital Fractional-N PLL for Communications Applications ![]() | Related |
Generally, pPLL08 is focused on wireless, wired, and optical communication. It can be optimized for digital radio (such as 5G, Bluetooth LE, narrowband IoT, etc.), SerDes, photonics, and other applications with very stringent performance requirements.
In a next step, Perceptia plans to update its logic clocking PLL pPLL02 and its low-jitter PLL pPLL03 to the new architecture. Those PLLs use ring oscillators, and because no analog circuits are needed, they can be roughly 10X smaller than conventional PLLs, depending on the process node.
Perceptia protects its unique second-generation digital PLL technology with a fast expanding portfolio of patents.
About Perceptia Devices
Perceptia Devices, Inc. is a Silicon Valley-based IP and design services provider, with a design center in Sydney, Australia. It is focused on high-speed and ultra-low-power mixed-signal semiconductor designs. Its specialization and innovation in all-digital PLLs, a distinction from its competitors, allows it to steadily build a portfolio of proprietary and patented architectures and circuits that bring value to demanding applications. Perceptia is privately owned and self-funded. For more information, visit www.perceptia.com.
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