Munich, Germany – December 17th, 2018 – Codasip, the leading supplier of RISC-V® embedded processor IP, announced today that Vidtoo Technology, a leader in semiconductor products for machine learning and high-performance computing, has selected Codasip’s Bk3 processor for future HPC chips.
Vidtoo Technology, based in Hangzhou, China, focuses on high-bandwidth, high-performance, high-connectivity, artificial intelligence platforms and inference engines for data centers as well as 3D video processing technologies for industrial IoT applications and SR (Simulated Reality)/MR applications with on-chip decision making capabilities.
“We are pleased to announce our selection of Codasip’s Bk3 processor for our next HPC products. After careful consideration, we determined that Codasip offered the best combination of performance, value and design expansion ability. Those traits, plus best-in-class support and the broad ecosystem that the open RISC-V ISA brings, gave us confidence that Codasip was the right choice”, stated Thomas Hu, CEO of Vidtoo Technologies. “We look forward to a long and successful partnership with Codasip when we strive to provide customers with the optimal design across our product families.”
The Codasip Bk3 processor, based on the RISC-V open instruction set architecture (ISA) definition, features a single 3-stage in-order execution processor pipeline, and offers optional caches, IEEE 1149.1 debug, and industry standard bus interfaces. Further, the Bk3 – like all Codasip RISC-V implementations – is fully configurable and extensible, offering great advantage over traditional, fixed-configuration processor IP cores.
“We are delighted that Vidtoo Technology has chosen Codasip to be its provider of RISC-V processor IP,” added Chris Jones, Codasip’s Vice President of Marketing. “Vidtoo is a rising star in the semiconductor industry with an impressive product portfolio that includes cutting-edge machine-learning devices. They have wide-ranging processing needs, and Codasip technology gives them a proven family of processor solutions complete with a comprehensive high-performance software toolchain.”
Codasip delivers leading-edge processor IP and high-level design tools that provide ASIC designers with all the advantages of the RISC-V open-standard ISA, along with the unique ability to automatically optimize the processor IP. As a founding member of the RISC-V Foundation and a long-term supplier of LLVM and GNU-based processor solutions, Codasip is committed to open standards for embedded processors.
Formed in 2006 with research and development located in Brno, Czech Republic, Codasip currently has offices in the US and Europe, with representatives in Asia and Israel. Codasip is currently venture-backed by Credo Ventures, Ventech Capital, Shenzhen Capital, Paua Ventures, and Western Digital.
For more information about Codasip’s products and services, visit www.codasip.com.
RISC-V is an open, free instruction set architecture (ISA) enabling a new era of processor innovation through open standard collaboration. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation. For more information, visit www.riscv.org.