LOS GATOS, Calif. -- December 16, 2002 -- TransEDA® PLC, the leader in ready-to-use verification solutions for electronic designs, announced that Goyatek Technology Inc. (also known as Goya) have standardized on TransEDA's VN-Cover™ coverage analysis solution and VN-Check configurable HDL checker as part of its verification methodology for its design services and Intellectual Property development.
"Goya is a leading provider of design services with expertise in advanced process technologies, SoC design and ASIC design. As our customers move their designs to 0.18-micron and finer process geometries, they face design challenges that traditional verification, synthesis and place & route point-tool flows cannot address," said Tony Peng, vice president of R&D at Goya. "As a user of TransEDA's verification tools, we will be ready to offer our customers the performance and time-to-market benefits they need in order to maintain their competitive edge."
"We chose VN-Cover because it gave us condition and path coverage and wasn't dependent on any particular simulator," said Tony Peng. "Some of our IP designers write very complicated constructs using a variety of coding styles which are sometimes difficult to debug. We found that condition coverage in VN-Cover and the rule data bases in VN-Check have given us tremendous assistance in carrying out our verification tasks and improving IP quality."
"We initially run a quality check on our code using VN-Check to highlight coding violations and identify any constructs that are not synthesizable," said Nai-Yin Sung, CAD director at Goya. "After making subjective judgments on these results we then re-run the various test benches and check the effectiveness of the design using VN-Cover. Our target is to achieve 100 per cent statement, branch, basic sub-condition, and focused-expression coverage (FEC) using the metrics available within VN-Cover. The main objective is to get higher productivity and pre-verified IPs that speed the completion of future designs at Goya."
"VN-Check is a configurable HDL checker for both Verilog and VHDL designs with over 1,000 rules. We use VN-Check on customer RTL design-in and our digital IP to guarantee design quality" said Nai-Yin Sung, "This enables us to find and fix problems like simulator and synthesis mis-matches that we might have only found late in the design process. Once we have fixed these problems we can then add other information for less critical problems until we have brought the design into full conformance with our guidelines."
David Dempster, marketing executive at TransEDA said, "The demand for high quality IPs from suppliers such as Goya continues to rise. Additionally, the larger semiconductor and system houses are making proven IP qualification a mandatory requirement when selecting third-party IPs. TransEDA's verification tools provide companies like Goya with significant advantages in reaching quality goals. By setting coverage standards and improving code quality, we can help Goya and other IP vendors deliver first-rate IPs that their customers can trust."
TransEDA Tools are Key to IP Development and Qualification
Goya has incorporated TransEDA's Verification Navigator product suite (coverage analysis and configurable HDL checker) as part of its IP design and qualification process. TransEDA's VN-Cover™ coverage analysis solution helps Goya measure the effectiveness of the test suite developed for a particular core. Its ease-of-use enables the creation and enforcement of stringent corporate goals for coverage of all possible conditions by the test suite. TransEDA's VN-Check™ configurable HDL checker provides a wide of variety of pre-defined rulesets to help Goya eliminate design problems that cause costly downstream errors.
About Goyatek Technology Corporation
Goyatek Technology Inc. (also known as Goya), was founded in 1998. Goya provides Automatic Placement & Routing service to TSMC's customers as well as SoC/ASIC turnkey service and intellectual property services.
Goya passed the certification of ISO 9001:2000 in May 2001. Through an alliance with MOSIS, a leading MPW service partner, Goya provides stable, reliable and cost-effective MPW solutions. Goya provides various digital & mixed-signal IP design services, such as special I/O, high-speed I/O, ADC/DAC, PLL, etc. Goya also has broad experience in SoC (System on Chip) physical integration.
With IP service and DFT solution services, Goya assist clients in SoC design and integration. Goya focuses on services based on TSMC's foundry, offering advance services in line with TSMC's advance process technologies. Goya concentrates on leading the service technology industry, offering best-in-class service and becoming a "Virtual Design Team."