Numem Inc. Exhibits at IP-SoC Santa Clara 2019

SUNNYVALE, Calif. - April 9, 2019 - Numem (formerly known as NVMEngines, Inc.), will be exhibiting its NuRAM^TM MRAM Memory IP test chip at the IP-SoC 2019, on April 9, 2019 at the Hyatt Regency Center in Santa Clara.

Numem’s NuRAM^TM memory IP Cores and Design Automation Tools are based on MRAM and other Resistive RAM technologies, and silicon proven over multiple tapeouts and 1,000+ devices.

They provide an excellent alternative for Microcontroller, Processor, AI Chip, Flash Memory Subsystem and in general SoC Designs to provide a lower power, higher performance and higher endurance solution than Flash and 2-3x smaller area and 7x lower leakage current than SRAM. For AI and Microprocessor designers looking for a larger L3/L4 Cache, Numem’s NuRAM^TM enables to embed up to 3x larger memory sizes in a given area and the ability to retain data at ultra-low power for battery saving or in case of power outage. Numem’s NuRAM^TM IP cores bring power/performance/cost benefits and are expected to improve with process scaling over time.

Numem will be exhibiting from 9:00 a.m. to 5:00 p.m., demonstrating its MRAM Memory IP test chip.

Where: HYATT REGENCY SANTA CLARA
5101 Great America Pkwy, Santa Clara, CA 95054, USA

http://www.design-reuse-embedded.com/ipsocdays/ipsocdays2019/santaClara2019

About Numem

Numem (formerly NVMEngines) headquartered in Sunnyvale, California, is the leading provider of advanced NVRAM Memory IP Cores based on its patented “NuRAM^TM technology. Leveraging 50⁺years’ experience in MRAM/Resistive RAM memory design, multiple test chips, and data collected on 1,000+ devices, Numem provides an excellent SRAM and eFlash alternative to SoC Designers and Architects that can also aggregate ROM, EEPROM and OTP. Numem’s NuRAM^TM is targeting Microcontroller, Processor, A.I./DSP Processing, and in general SoC Designs for applications including: IoT, Autonomous Vehicle, Smart Factory, Smart Home, Smart Healthcare and Flash SSD. Numem’s silicon-proven NuRAM^TM memory IP Cores enable differentiation a 3x reduction in memory size (or higher density) and 7x lower standby power dissipation.

Visit our website http://www.numem.com