May 23, 2019 – With high power consumption and hardware requirements, GPU/TPU might not be suitable for future AI IoT solution. Also, high precision computation might not be necessary for AI edge computation algorithm. Instead, the Fuzzy mathematic field might be the best approach. Scientists recently try to develop lower bits processor, such as 16-bit or 8-bit AI ASIC architecture for edge computation. By adopting In-Memory Computation (IMC) with analog memory, the data can be real-time handled.
In-Memory Computation (IMC) is an emerge architecture for recent AI deep learning filed. Different from traditional computing, IMC could process data in parallel and shorter processing time. In AI neural network system, the weighting is calculated by resistance changing of memory. The key factor to achieve such algorithm is by using analog memory. By the grace of new technology, we do have novel resistive NVM such as MRAM, PCM, and FeRAM, then the IMC could be realized. However, comparing to standard CMOS process, those modern technologies require additional process steps and materials which might require more effort to be universal.
AGIC Particle Momentum could realize Analog OTP Memory
The analog OTP memory could help very front-end sensor devices to realize analog computation and to reduce hardware complexity. With edge computation, those sensors could provide real-time data which are pre-sorted/pre-processed to cloud server for more complex process. It can not only speed up the whole progress, but also lower the server loading to further provide more in-time result.
AGIC team is demonstrating how to achieve analog OTP memory with AGIC Particle Momentum. From recent results, as shown in Table 1, the resistance could be controlled by the relation of programming energy and time. At this stage, the table shows the preliminary performance of AGIC C-Fuse. By adjusting energy and time, the precise control of resistance could be realized by AGIC team. In addition, the precise control of PGM operation on C-Fuse macro also enables the yield improvement to solve low yield issue causing by traditional explode method. At next phase, AGIC team will dedicate to perform the linearity, precision, and reliability of AGIC analog OTP memory.
Table 1. Relation of Energy, OTP Cell Resistance, and Time
*R = Normalized resistance; *T = Normalized time unit
AGIC Technology C-Fuse OTP provides following benefits:
- Smaller area to lower the cost for silicon wafer.
- No charge pump (CP) required.
- Field programmability during system development.
- Density supports a widely range from 8K to 4M bits.
- Low voltage/current PGM and read.
- High-Temp Immunity (>650°C~1000°C) and high reliability from -55°C to 195°C.
- Supporting BCD/BJT/DRAM/Flash/CDMOS/MS and HV processes for analog, power and LCD/OLED/Touch Panel applications.
- Long-life data retention.
- Require very lower power consumption.
- High security and difficult-to-reverse engineer.
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