PVT Controller (Series 5) (Sub-system for complete PVT monitoring), TSMC N4P
CAST Expands Popular UDP/IP Networking Cores Line
Additional channels and 100Gb/second Ethernet support make fast UDP/IP data communication available for more system applications
Woodcliff Lake, NJ — May 23, 2019 — Semiconductor intellectual property (IP) provider CAST, Inc. today announced two extensions to its line of UDP/IP cores for lean Internet Protocol networking: an increase up to 32 channels for its existing 10G and 40G UDP/IP Hardware Protocol Stacks, and the upcoming release of a faster, 100G version of these IP cores.
The User Datagram Protocol (UDP) is part of the Internet Protocol (IP) suite of networking communication standards. It operates without the error resiliency of the Transmission Control Protocol (TCP), providing significantly faster networking with fewer hardware resources and less consumption of bandwidth. UDP/IP is thus well-suited to applications like live video broadcasting, where receiving most of the data packets on time matters more than receiving every single packet.
CAST has offered UDP/IP Hardware Stack cores since 2011, helping several dozen customers implement fast networking in a range of applications including industrial robots, satellite communications, wireless video transmission, scanner controllers, surveillance cameras, radar systems, and 3D surface measurement. These Hardware Stack cores operate independently, freeing a system’s processor from managing UDP functions to reduce design complexity and lower power consumption.
The new product line additions further expand the suitability of CAST’s UDP/IP solutions:
- Increased UDP channels—up to 32 transmit and 32 receive—enables breaking large data transmissions into smaller separate streams for parallel processing by slower systems, e.g. software UDP receivers, or the assignment of data from multiple sources to individual UDP streams for easier integration.
- While the current support for up to 40 gigabits per second Ethernet (40GbE) is more than adequate for many applications, the new core’s 100GbE capability will make the advantages of UDP/IP available to applications that must move more data faster.
About the UDP/IP Hardware Stack Cores
The increased UDP channels and 100G transmission capability make the features, performance, and silicon usage of CAST’s UDP/IP offerings comparable or superior to the few competing commercial cores. Features include:
- A complete UDP/IP Hardware Stack, including IPv4 support; Jumbo and Super Jumbo Frames; Unicast and Multicast; port filtering; checksums generation and validation; and optional Ethernet CRC validation.
- Support for related networking standards and functions including ARP with Cache; ICMP (ping reply); IGMP v3 (multicast); VLAN (IEEE 802.1Q); and a built-in DHCP client.
- Straightforward run-time configuration of operational factors such as the local MAC and IP addresses and multicast receive address, and extensive control functions such as enabling or disabling packet reception, checksum action, and DHCP fallback.
- Easy system integration, with flexible interfaces (AHB, AXI, Avalon, or Wishbone) and optional pre-integration with popular Ethernet MAC cores.
- Availability in synthesizable RTL for ASICs or optimized netlists for devices from Intel, Lattice, Microsemi, and Xilinx (see the product pages for sample implementation results).
“We engineered these cores to make it very cost- and resource-effective for customers to gain the benefits of UDP/IP, providing easy system integration and nearly negligible impact on silicon area or performance,” said Tony Sousek, director of CAST’s European development center. “These UDP/IP enhancements satisfy frequent customer request while also expanding the potential applications and systems that can benefit from UDP/IP networking.”
Availability and More Information
The 10G and 40G UDP/IP Hardware Stack Protocol cores are available now. The 100G UDP/IP Hardware Protocol Stack is undergoing extensive testing and will ship within two months. These UDP/IP stacks are part of the broad line of leading-edge and standards-based digital IP available from CAST, including compression engines and image processing functions; 8051 microcontrollers and low-power 32-bit BA2X™ processors; industry-leading automotive interfaces; a complete family of SoC security modules; and a variety of peripherals, interfaces, and other IP cores.
Learn more by visiting www.cast-inc.com.
Search Silicon IP
CAST, Inc. Hot IP
- Intilop delivers on Altera FPGAs, their 7th Gen. industry first, Full TCP, UDP & IGMP Hardware Accelerator System with Dual 10G ports for all Hyper Performance Networking Systems
- Digital Blocks Announces 2nd Gen Audio/Video & Data Hardware Protocol Stacks Supporting MPEG2 Transport Stream (TS), RTP, and UDP/IP Protocols
- Intilop Delivers Their Enhanced One Thousand TCP/UDP Session Hardware Accelerator and Kernel Bypass Linux Driver for Hyper-Performance Networking Systems
- CAST Expands Streaming Video IP Line with Motion JPEG Subsystem
- Intilop releases Network Security TOE Module for Altera and Xilinx FPGAs for their 10G & 40G Full TCP & UDP Offload Engines
- GlobalFoundries and STMicroelectronics Finalize Agreement for New 300mm Semiconductor Manufacturing Facility in France
- Microchip Slashes Time to Innovation with Industry's Most Power-Efficient Mid-Range FPGA Industrial Edge Stack, More Core Library IP and Conversion Tools
- Consortium's Move Will Boost RISC-V Ecosystem, Thankfully
- Are Chiplets Enough to Save Moore's Law?
- Andes Technology Showcases Pioneering RISC-V CPU IP Solutions at RISC-V Summit Europe
- Nanusens announces that it can now create ASICs with embedded sensors
- Intel Foundry Services Ushers in a New Era
- Chiplet Pioneer Eliyan Achieves First Silicon in Record Time with Implementation in TSMC 5nm Process, Confirms Most Efficient Chiplet Interconnect Solution in the Multi-Die Era
- MediaTek Partners With NVIDIA to Provide Full-Scale Product Roadmap to the Automotive Industry
- Semidynamics announces largest, fully customisable Vector Unit in the RISC-V market, delivering up to 2048b of computation per cycle for unprecedented data handling
|E-mail This Article||Printer-Friendly Page|