ARC Cores unveils interfaces for USB
![]() |
ARC Cores unveils interfaces for USB
By Jeanne Graham, EBN
September 5, 2001 (12:44 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010905S0045
ARC Cores, Inc. has introduced new interfaces that the company says will reduce SoC development time by making it easier to connect third party and existing IP to ARC's user-customizable 32-bit processor. Developers can use the ARChitect processor configuration tool to add either USB 1.1 or USB 2.0 to the ARCtangent-A4 processor -- a capability that ARC says opens a new market for their processor in PC-based consumer electronics and office automation. The company is also announcing standard BVCI (Basic Virtual Component Interface) and AMBA interfaces for its core. While most processor vendors support one or the other interface standard, ARC claims it is offering the first soft IP processor core that supports both BVCI and AMBA. "Designers are developing more and more complex systems in shorter time frames," said Ashish Sethi, product manager for the IP company, a subsidiary of ARC International, based in Elstree, England. Designer s want to use in-house legacy IP as well as new IP acquired from third parties, but often the IP is acquired from different or competing vendors and does not integrate easily, he said. "Almost half the SOC development time is spent integrating and verifying all these IP modules," said Sethi. "Designers have to delve deep into the IP and understand it before they can build new logic for their systems, so they're spending additional time designing new logic." There are obvious advantages to using processor cores, with industry-standard interfaces, which will enable developers to "plug-in" various IP, said Rich Doherty, an analyst at The Envisioneering Group, Seafort, NY. "In this market, it's all about time-to-market," said Doherty. "A tool that speeds design development for standard interfaces is a product for which users will be willing to pay a premium." ARC's USB 2.0 and BVCI capability will be offered through the ARChitect configuration tool during the fourth quarter. The AMBA capability will be offered in the first quarter of 2002. Pricing information has not yet been released.
Related News
- T2M-IP Unveils Revolutionary MIPI D-PHY & DSI Controller IP Cores with speed 2.5Gbps/lane, Redefining High-Speed Data Transfer and Display Interfaces
- TSMC 12FFC silicon proven SERDES Phy IPs' for HDMI 2.1, PCIe Gen5, DDR4, USB 4 & MIPI Interfaces available immediately for your next SoC
- Faraday Unveils the Industry's Smallest USB 2.0 OTG PHY IP
- Corigine Unveils First Certified SuperSpeed+ USB 3.1 Gen 2 IP With M31 28nm PHY
- Faraday Unveils 28HPC USB 3.1 PHY and 40LP Type-C PHY with PD Controller
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |