SANTA CLARA, Calif.-- May 28, 2019 -- Silvaco Inc., a leading global provider of software, IP and services for designing chips and electronic systems for semiconductor companies, today announced Viola I0-X, a scalable semiconductor intellectual property (IP) characterization and modeling tool and the latest addition to the Silvaco Foundation IP product line.
By leveraging new Intelligent Optimization delivering 10X faster performance (I0-X) and embedding Silvaco's SmartSpice simulator and Jivaro-A reduction technology, the fully automated Viola I0-X flow delivers accurate models and faster turnaround time, setting a new standard in Input/Output (I/O) Pad circuitry characterization and modeling for designs targeted at nanometer process nodes.
Viola I0-X is an advanced characterization system that automatically performs static structural analysis on transistor-level netlists of standard cells and complex custom cells or macros. It uses the results of this analysis to set up complete characterization constraints and then leverages the foundry-certified, highly accurate and accelerated SmartSpice simulator to increase the overall throughput of timing, power, noise and statistical static timing analysis (SSTA) model generation. Viola I0-X not only offers faster I/O pad characterization capabilities, it supports all industry-standard model formats and includes a closed-loop model validation flow that allows users to seamlessly launch third-party to verify the generated models.
“Certus provides the most advanced solutions for optimizing area, power, Electro-Static-Discharge (ESD) protection, features and performance of I/O circuits,” said Stephen Fairbanks, Director at Certus Semiconductor. “With Viola IO-X, we met the tight development and characterization schedule for our client, a leading provider of IoT sensors. Its 10X faster throughput makes no compromises in accuracy and enables optimization of the area, power, and performance of I/O pad circuitry.”
"With Viola I0-X, I/O pad developers no longer need in-depth knowledge of a circuit's electrical operation to properly set up a characterization run. Manual modeling efforts are eliminated which leads to reduced delay in model development and excludes human errors," said Ole Christian Andersen, General Manager of the EDA Division at Silvaco. "The technology in Viola I0-X extracts functionality, identifies all electrical arcs, and optimizes the complete characterization methodology for efficiency and accuracy, significantly reducing the time and effort to model I/O pads and delivers 10X faster I/O Pad characterization through the use of Silvaco’s Intelligent Optimization technology."
Viola I0-X: Faster, More Reliable Model Sign-off
At the heart of Viola I0-X are Silvaco's proprietary circuit functional recognition, vector generation and SmartSpice simulation and Jivaro-A reduction technologies . Each contributes to the ease of setup, accelerated characterization throughput and quality of model sign-off in Silvaco's characterization solution:
- Leveraging intelligent algorithms, Viola I0-X automatically recognizes and models the functionality of standard cells and generates an efficient vector set for all timing arcs. By eliminating time-consuming, manual analyses, Viola I0-X dramatically reduces the time required to set up and characterize I/O pads across a wide range of functional modes, process points, supply voltages and junction temperatures. The ability to efficiently handle the increasing number of process, voltage and temperature (PVT) points and operating modes is critical to nanometer design success.
- Viola I0-X's smart topology-driven vector generation features unique structure-based vector optimization and an intrinsic, simulation-induced constraint acceleration algorithm. These features eliminate vector redundancy and avoid unnecessary simulation while maintaining characterization accuracy. Viola I0-X also offers a flexible methodology, allowing the user to supply a vector set and its sequence for specific measurements.
- Viola I0-X supports commercially available SPICE simulators, including Silvaco's SmartSpice. When used in conjunction with SmartSpice, Viola I0-X's optimized vector generation capabilities deliver an order-of-magnitude faster throughput than previous generations of Viola, without any loss of accuracy. SmartSpice is a full SPICE simulator in wide use by analog/mixed-signal designers, foundries and IP developers down to 5nm.
- Jivaro-A is the industry-leading RC parasitic reduction technology for layout parasitic extraction (LPE). Its circuit optimization is based on accuracy requirements, stability of simulation, realistic values, reliability of analysis and verifiability. Jivaro-A is not a simple data crunching or filtering tool. Optimized for SPICE netlists, it reduces simulation time, increases accuracy compared to built-in reduction of circuit simulators and offers blazing fast processing.
Pricing and Availability
Viola IO-X is available now. Contact Sales@Silvaco.com for more details.
56th Design Automation Conference
Silvaco will showcase its suite of solutions from Atoms to Systems at the 56th Design Automation Conference (DAC) in Las Vegas, Nevada, June 3 – 5. Silvaco technology experts will be available to discuss and demonstrate our broad portfolio of smart solutions with emphasis on new products and capabilities such as Viola IO-X.
About Silvaco, Inc.
Silvaco is a leading EDA tools and semiconductor IP provider used for process and device development for advanced semiconductors, power IC, display and memory design. For over 30 years, Silvaco has enabled its customers to develop next generation semiconductor products in the shortest time with reduced cost. We are a technology company outpacing the EDA industry by delivering innovative smart silicon solutions to meet the world’s ever-growing demand for mobile intelligent computing. The company is headquartered in Santa Clara, California and has a global presence with offices located in North America, Europe, Japan and Asia. For more information, visit Silvaco.com.