By Dylan McGrath, EETimes
June 18, 2019
SANTA CLARA, Calif. — Momentum continues to coalesce slowly around the creation of an open chiplet ecosystem, enabling the heterogeneous integration of chiplets from multiple vendors in a system-in-package.
Chiplets represent one of several efforts to compensate for slowing performance gains through brute force scaling; it's the slowing of Moore's Law. While individual chip companies including Intel, Marvell, and startup zGlue — as well as system companies such as Cisco — have had some success in creating their own chiplet ecosystems, efforts to date have relied on proprietary multi-chip interfaces.
The development of an industry-wide open chiplet ecosystem that would allow designers to assemble "best of breed" chips incorporating components from multiple vendors requires not only standard open interfaces but also technology advancements in areas such as wafer testing and thermal management and the creation of new business models.