English
PCI-SIG Announces Upcoming PCI Express 6.0 Specification to Reach 64 GT/s
SANTA CLARA, Calif.--June 18, 2019 -- PCI-SIG Developers Conference 2019 – PCI-SIG® today announced that PCI Express® (PCIe®) 6.0 technology will double the data rate to 64 GT/s while maintaining backwards compatibility with previous generations and delivering power efficiency and cost-effective performance. The PCIe 6.0 specification is actively targeted for release in 2021.
PCIe 6.0 Specification Features
- Delivers 64 GT/s raw bit rate and up to 256 GB/s via x16 configuration
- Utilizes PAM-4 (Pulse Amplitude Modulation with 4 levels) encoding and leverages existing 56G PAM-4 in the industry
- Includes low-latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency
- Maintains backwards compatibility with all previous generations of PCIe technology
“PCI Express technology has established itself as a pervasive I/O technology by sustaining bandwidth improvements for five generations over two decades,” Dennis Martin, an analyst at Principled Technologies, said. “With the PCIe 6.0 specification, PCI-SIG aims to answer the demands of such hot markets as Artificial Intelligence, Machine Learning, networking, communication systems, storage, High-Performance Computing, and more.”
“Continuing the trend we set with the PCIe 5.0 specification, the PCIe 6.0 specification is on a fast timeline,” Al Yanes, PCI-SIG Chairman and President, said. “Due to the continued commitment of our member companies, we are on pace to double the bandwidth yet again in a time frame that will meet industry demand for throughput.”
To learn more about PCI-SIG, visit www.pcisig.com.
About PCI-SIG
PCI-SIG is the consortium that owns and manages PCI specifications as open industry standards. The organization defines industry standard I/O (input/output) specifications consistent with the needs of its members. Currently, PCI-SIG is comprised of over 800 industry-leading member companies. To join PCI-SIG, and for a list of the Board of Directors, visit www.pcisig.com.
|
||||||
Related News
- PCI-SIG® Announces PCI Express® 7.0 Specification to Reach 128 GT/s
- PCI-SIG Releases PCIe 6.0 Specification Delivering Record Performance to Power Big Data Applications
- PCI-SIG Achieves 32GT/s with New PCI Express 5.0 Specification
- PCI-SIG Publishes PCI Express 4.0, Revision 0.9 Specification
- PCI-SIG Releases PCI Express M.2 Specification Revision 1.0
Breaking News
- Arm Announces Appointment of Paul E. Jacobs and Rosemary Schooler to its Board of Directors
- Cadence and UMC Certified mmWave Reference Flow Delivers First-Pass Silicon Success
- QuantWare launches Foundry Services for superconducting quantum chips
- SiFive Expands Presence in India to Keep Up with the Company's Ultra-fast Growth
- CAES Design Win of RISC-V/NOEL-V IP for Idaho Scientific Secure Processor for US Critical Infrastructure
Most Popular
- Gartner Forecasts Worldwide Semiconductor Revenue Growth to Decline 3.6% in 2023
- EU edges closer to Chips Act
- Cortus announces the launch of LOTUS family with two new RISC-V microcontrollers (MCUs)
- Arm public offer likely to be postponed beyond Q123
- DMP Launches "ZIA SV" Stereo Vision IP for AMD Xilinx Adaptive Computing Devices
|
E-mail This Article | 
|
|
Printer-Friendly Page |