NXP to Adopt Synopsys' Native Automotive Design Solutions for Next-generation Safety-critical SoCs
Synopsys' Innovative Technologies Deployed to Meet Highest ASILs in Response to Rapid Growth of Autonomous Driving and ADAS
MOUNTAIN VIEW, Calif. -- Oct. 15, 2019 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that NXP, the world leader in secure connectivity solutions for embedded applications, plans to deploy Synopsys' native automotive design solutions to improve quality-of-results (QoR) and time-to-results (TTR) for its next-generation, safety-critical system-on-chip (SoC) designs. The accelerating evolution of vehicle technologies means that more automotive chips are required to satisfy higher automotive safety integrity levels (ASILs) for autonomous driving and advanced driver-assistance systems (ADAS). To meet higher ASILs, functional safety mechanisms, such as triple-mode redundancy (TMR) and dual-core lock-step (DCLS), can be used. These mechanisms mitigate random hardware failures in automotive designs, such as single-event upsets (SEUs), but can present TTR, capacity, and QoR design challenges which can be significantly alleviated using Synopsys' native automotive design solutions.
"NXP's diverse automotive portfolio supports applications, such as advanced driver-assistance systems, autonomous vehicles, and high-performance communications. The goal of our chip creation team is to extract the maximum potential from our designs while meeting the desired ASIL in the shortest time-to-market," said Stefan Scharfenberg, manager of Chip Creation at NXP. "We are pleased with these industry-leading quality-of-results using this technology, and we plan to adopt Synopsys' native automotive design solutions for our next-generation safety-critical SoCs."
Using its 16-nanometer (nm) S32G274 automotive network processing chip, NXP tested Synopsys' native solutions for implementing TMR registers. Compared to its existing flow, NXP observed significantly reduced IC Compiler™ II placement and legalization runtime by more than 20 percent. This functionality also markedly improved capacity of job execution, which enabled NXP to leverage the most cost-effective compute farm. In addition, the native automotive solutions alleviated routing congestion and wire length in dense areas of the design, and improved usability with simplified implementation and comprehensive reporting to replace NXP's homegrown scripting solutions.
Synopsys' native automotive solutions enable designers to achieve their target ASILs by providing the industry's most comprehensive feature set to implement functional safety mechanisms, such as TMR, DCLS, and failsafe finite state machine (FSM). Synopsys' native automotive solutions comprise a complete digital design flow incorporating functional safety (FuSa)-enabled technologies.
"Automotive designers face enormous pressure to implement functional safety solutions quickly with minimal impact to quality-of-results. Synopsys continues to collaborate with industry leaders such as NXP on innovative solutions to increase safety in the automotive industry," said Shankar Krishnamoorthy, senior vice president of design implementation for the Design Group at Synopsys. "NXP's achievements demonstrate the strong success of Synopsys' innovative automotive technologies and exemplify the impressive productivity gains that automotive SoC designers can achieve."
Availability
Synopsys' native automotive design solutions will be generally available in December 2019. For more information on Synopsys' automotive solutions, please visit www.synopsys.com/automotive.html.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
|
Synopsys, Inc. Hot Verification IP
Related News
- Socionext Adopts TSMC's 5-nanometer Technology for Custom SoCs Targeting Next-Generation Automotive Applications
- CEVA's High-Performance DSP Solution to Power Renesas' Next-Generation Automotive SoC
- Samsung Adopts Synopsys' Machine Learning-Driven IC Compiler II for its Next-Generation 5nm Mobile SoC Design
- Synopsys Introduces Native Automotive Solutions Optimized for Efficient Design of Autonomous Driving and ADAS SoCs
- Synopsys' Fusion Compiler Enables Renesas to Accelerate Delivery of Next-Generation Automotive Designs
Breaking News
- Launching MosChip DigitalSky™ for Building Connected Intelligent Enterprises
- Crypto Quantique collaborates with ADLINK to simplify and enhance device security in industrial PCs
- Xiphera Partners with IPro for the Israeli Chip Design Market
- Siemens collaborates with GlobalFoundries to certify Analog FastSPICE for the foundry's high-performance processes
- EXTOLL collaborates with Frontgrade Technologies for High-Speed SerDes IP
Most Popular
- BrainChip Introduces Lowest-Power AI Acceleration Co-Processor
- Launching MosChip DigitalSky™ for Building Connected Intelligent Enterprises
- Siemens collaborates with GlobalFoundries to certify Analog FastSPICE for the foundry's high-performance processes
- RaiderChip brings Meta Llama 3.2 LLM HW acceleration to low cost FPGAs
- Crypto Quantique collaborates with ADLINK to simplify and enhance device security in industrial PCs
E-mail This Article | Printer-Friendly Page |