GLEN ROCK, New Jersey, December 30, 2019 – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers with Embedded Processor & Peripherals requirements, extends its leadership of low-latency, high performance UDP/IP networking Verilog Cores with releases for 50 & 100 GbE networks.
These releases joins Digital Blocks 1 GbE, 10 GbE, 25 GbE, & 40 GbE UDP Hardware Protocol Stacks IP Cores.
The UDP IP Core supports IPv4, ICMP, IGMP, ARP, DHCP, VLAN & Jumbo frames. On the network side, the interface support Ethernet MAC’s from Intel/Altera, Xilinx, and Synopsys. More information can be obtained at https://www.digitalblocks.com/ip-cores-networking.html
Price and Availability
Digital Blocks UDP Protocol Hardware Stack IP Cores are available immediately in synthesizable Verilog, along with a simulation test bench with expected results, datasheet, and user manual. For further information, product evaluation, or pricing, please go to Digital Blocks at http://www.digitalblocks.com
About Digital Blocks
Digital Blocks is a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers requiring best-in-class IP for Embedded Processors, I2C/SPI/DMA Peripherals, MIPI I3C peripheral, TFT LCD/OLED Display Controllers & Processors, 2D Graphics Hardware Accelerator Engines, Display Link Layer Drivers, Video Signal & Image Processing, and Low-Latency TCP/UDP/RTP Hardware Protocol Stacks.
Digital Blocks designs silicon-proven IP cores for technology systems companies, reducing customer’s development costs and significantly improving their time-to-volume goals. Digital Blocks is located at 587 Rock Rd, Glen Rock, NJ 07452 (USA). Phone: +1-201-251-1281; Fax: +1- 702-552-1905; Media Contact: firstname.lastname@example.org; Sales Inquiries: email@example.com; On the Web at www.digitalblocks.com