IP cores offer a cutting-edge mathematically lossless compression algorithm designed to facilitate the management of large volumes of raw data captured by automotive image sensors.
February 12, 2020 -- Hardent, a leading provider of video compression IP products, today announced the forthcoming availability of its new mathematically lossless video compression IP cores. Hardent’s lossless video compression (HLVC) technology offers mathematically lossless compression specifically designed to facilitate the challenges associated with capturing, processing, storing, and playing back large amounts of raw data from automotive image sensors.
Advanced Driver-Assistance Systems (ADAS) such as lane departure warnings, collision avoidance, and emergency braking systems, have become increasingly common in recent years. As the automotive industry moves towards autonomous driving, ADAS will be a key safety component of fully autonomous vehicles. ADAS collect data from a number of different sources including sensors, LIDAR, and cameras in order to build a picture of a car’s surroundings and react accordingly. This results in a huge amount of data collected, which is then brought together in the fusion electronic control unit (ECU). In the case of an autonomous vehicle, the captured data needs to then be transmitted, stored, processed, and analyzed, without altering the original data captured in any way.
Developed by Hardent’s in-house R&D team, HLVC uses an innovative compression algorithm to deliver compelling compression ratios, while preserving a bit-exact representation of the original data. Using Hardent’s lossless compression enables designers to reduce their overall storage space and memory footprint, lower transfer bandwidth on transmission links, as well as reduce the overall power consumption of their design. “Lossless video compression offers a unique, cost-effective solution to manage the sheer volume of data collected by next-generation vehicles,” says Alain Legault, VP IP Products at Hardent. “Our mathematically lossless IP cores have been extensively tested and verified to ensure true mathematically lossless compression for use in an automotive environment.”
Key features of Hardent’s mathematically lossless IP cores include:
- Support for a wide variety of raw data formats
- A small footprint for FPGA & ASIC design
- Ultra low-latency performance
- Real-time encoding/decoding capabilities for both FPGA and ASIC design
- A software option for real-time and faster than real-time encoding/decoding
Hardent will be showcasing the first live demo of its HLVC technology at embedded world in Nuremberg, Germany. Participants will have the opportunity to see the compression ratios generated from both real-life camera captures and computer-generated images. Visit Hardent at PLC2’s demo spot in Hall 4, stand 560.