By Gary Hilson, EETimes (March 4, 2010)
TORONTO — At first glance, the rivalry between hybrid memory cube (HMC) and high bandwidth memory (HBM) mirrors the battle between Beta and VHS. But there’s one clear difference: HMC isn’t dead.
HMC uses a vertical conduit called through-silicon via (TSV) that electrically connects a stack of individual chips to combine high-performance logic with DRAM die so that memory modules are structured like a cube instead of being placed flat on a motherboard. This architecture enables much higher performance than DDR technology with lower power consumption.
The technology development was being led by the Hybrid Memory Cube Consortium (HMCC) and included major memory makers, such as Micron, SK Hynix, and Samsung, as well as other developer members, such as Altera, Arm, IBM, Microsoft, Open-Silicon, and Xilinx. But although some vendors incorporated HMC technology into their products and architectures, such as Intel, Altera, and Xilinx, it has not really taken off in the same way that HBM has, and the HMC specification never did follow through with a version 3.0. It has been adopted for some advanced, high performance computing and data science applications, too, including the Square Kilometer Array (SKA) program and in HPC solutions from companies such as Fujitsu.
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