T2M announces Industry's first Ultra Low-Power Bluetooth Dual Mode RF IP on TSMC 22nm.

Munich— June 24, 2020 — T2M, the world’s largest independent global semiconductor technology provider, announces the availability of Bluetooth Dual Mode RF IP on TSMC 22nm ULL process node. The IP is Bluetooth 5.2 compliant supporting Audio over BLE as well as backwards compatible with EDR & BR making this the first Bluetooth Dual Mode RF IP available in TSMC22ULL to support the latest features while providing full Bluetooth legacy support.

The Ultra-Low-Power Bluetooth Dual Mode RF transceiver IP is designed to support 2.4 GHz standards Bluetooth Classic (BR/EDR), Bluetooth Low Energy, 802.15.4 PHY Layer (ZigBee), and proprietary protocol implementations.

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Bluetooth Dual Mode v5.4 / IEEE 15.4 PHY/RF IP in TSMC22nm ULP

This Bluetooth Dual Mode RF IP has extremely low power consumption of <3 mW together with state-of-the-art performances (sensitivity, rejection, Tx power) and with very small die area / cost achieved by using TSMC22ULL.

Due to its ultra-low power consumption, reduced area, high sensitivity and high Output power this RF IP is the perfect fit for battery powered audio applications including, but not limited to: Hearing Aids, Earbuds, Hearables, Wearables, Sports, Health as well as battery powered IOT applications such as Indoor positioning, asset tracking, beacons, sensor networks.

“2020 marks the beginning of a new era for wireless audio, with the arrival of audio streaming over Bluetooth Low Energy (LE Audio). Our clients IP will be a perfect fit for the LE Audio Applications with Legacy support as well as new IOT applications requiring, extremely low power consumption, and leadership sensitivity” says Nigel Dixon, CEO, T2M.

This IP is the latest addition to T2M’s portfolio of Bluetooth technology for SoC development which includes: RF IPs in GF22FDX, TSMC40ULP, TSMC55, SMIC55, GF55 as well as Link Layers, Modems, Protocol Stacks, SIG MESH, Profiles, turn key ASICS developed based on the core IPs and even KGD for stacking/combining with a CPU.

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