Synopsys DesignWare CXL IP Supports AMBA CXS Protocol Targeting High-Performance Computing SoCs
High-Bandwidth IP Solution Extends CXL Capabilities to Arm-Based Multi-Processor Core Designs
MOUNTAIN VIEW, Calif. -- Oct. 8, 2020 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that its DesignWare® CXL Controller IP now supports the AMBA® CXS protocol, enabling an efficient interface with the latest, highly scalable Arm® Neoverse™ Coherent Mesh Network to provide an optimized multichip IP stack for a range of high-performance computing, datacenter, and networking system-on-chip (SoCs).
| DesignWare CXL Controller IP |
The DesignWare CXL Controller supports all the required CXL protocol types (.cache, .io, and .mem) and allows mixing multiple types within a single clock-cycle transfer for design flexibility. Support for CXS enables the extremely low-latency, high-bandwidth DesignWare CXL IP to extend its capabilities across Arm-based SoCs requiring cache coherency and fast chip-to-chip interconnects.
"The exponential growth in data creation, consumption, and processing is driving more cloud workloads to utilize domain specific acceleration, which demands a fast, efficient multichip interconnect to quickly move data," said Dermot O'Driscoll, vice president of Product Management, Infrastructure Line of Business, Arm. "Our successful collaboration with Synopsys enables an optimized, ready-to-go CXL IP stack to meet the diverse multichip latency and bandwidth needs for a range of Arm-based server host and end-point solutions."
"High-performance computing applications such as AI accelerators, networking, and hyperscale data centers require coherent interfaces that enable high-speed, efficient communication between on- and off-chip protocols," said John Koeter, senior vice president of marketing and strategy for IP at Synopsys. "By providing support for the AMBA CXS protocol, designers can easily interface Synopsys' DesignWare CXL IP to the Arm Coherent Mesh Network platform to meet the high-bandwidth requirements of their data-intensive Arm-based SoC designs."
Availability and Additional Resources
DesignWare CXL Controller IP and 32G PHY IP are available now. For more information, visit
- The DesignWare CXL IP web page
- The Verification IP for Arm AMBA CXS blog
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit http://www.synopsys.com/designware.
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
Search Silicon IP
Search Verification IP
Synopsys, Inc. Hot Verification IP
- Synopsys' Complete CCIX IP Solution Enables Cache Coherency for High-Performance Cloud Computing SoCs
- Synopsys Demonstrates Silicon Proof of DesignWare 112G Ethernet PHY IP in 5nm Process for High-Performance Computing SoCs
- PLDA Announces XpressLINK-SOC CXL Controller IP with Support for the AMBA CXS Issue B Protocol
- Synopsys and Socionext Expand Collaboration to Deploy HBM2E IP for 5-Nanometer Process in AI and High-Performance Computing SoCs
- Chelsio Adopts Synopsys DesignWare 56G Ethernet PHY IP to Accelerate Development of High-Performance Computing SoC
- We don't compete with our customers - TSMC
- Blue Cheetah Demonstrates Industry Leading Silicon-Proven Die-to-Die Interconnect Solution for Chiplets
- Imagination launches IMG CXM, the smallest GPU to bring effortless user interfaces into homes
- PCI-SIG Certifies VectorPath Accelerator Card for PCIe Gen5 x16 @ 32 GT/s
- Apple announces multibillion-dollar deal with Broadcom for components made in the USA
|E-mail This Article||Printer-Friendly Page|