The partnership allows updating of microarchitecture in the field through Menta co‑extended cores and Codasip Studio.
Sophia-Antipolis, France – Monday, December 8, 2020 – Menta S.A.S, a premier supplier of embedded FPGA (eFPGA) solutions, today announced its close collaboration with Codasip, a leading supplier of processing solutions for IC designers.
The cooperation enables joint customers to extend processors in systems on chip (SoC) after they have been manufactured. Codasip Studio allows an existing processor design to be extended by adding custom instructions and additional microarchitectural features. Such new capabilities can be implemented on Menta’s co-extended eFPGA cores which are optimized for implementing processor functions.
“By tightly coupling our innovative eFPGA technology with the Codasip processor design automation technology, we are not only creating a new product, but we are revolutionizing the way the processing will be performed for the next decades of the century,” said Menta Chief Executive Officer Vincent Markus. “By integrating eFPGA technology inside, we will fundamentally change the computing world and enable with RISC-V stakeholders the new golden age for computer architecture.”
Currently, there is no hardware solution in the field allowing the adding of instruction sets into a processing solution. It has been demonstrated that adding custom instructions to a base instruction set can deliver significant performance improvements while not disproportionally increasing the silicon area. Typical applications include cryptography, DSP and artificial intelligence. In particular, the open RISC-V ISA is designed to be modular and to allow custom instructions. Codasip Studio enables designers to create custom instructions and can generate the necessary register-transfer level (RTL) by implementing the custom instructions in the datapath. The joint Codasip-Menta solution allows the additional datapath logic to be implemented in the field using eFPGA co-extended.
“The combination of Codasip Studio and Menta’s eFPGA technology opens new possibilities of re-configuration and customization after the tapeout of the processor”, says Codasip Chief Technology Officer Zdeněk Přikryl. “Such architectures benefit from the power of automatically generated C compilers that leverage the newly-added logic for custom instructions. This enables users to stay on the leading edge of performance for a long time after the processor is in silicon.”
Menta Design Adaptive eFPGA IPs have a key role, unlocking such limitations. Menta eFPGA is a pure digital core, 100 percent standard cell-based and can be hardened in any technology node. The final solution will be provided with a software development package (SDK), that will contain tools for developing on Menta eFPGA and Codasip processors (a validated cross-compiling toolchain), pre-built libraries that designers can use without having to rebuild them, and documentation to help explain how all of these pieces work together.
Codasip focuses on on-chip processor solutions for system on chip (SoC) designers. The offering includes the Codasip Studio processor design environment, the family of Codasip RISC-V embedded and application processor cores, and the SweRV Core™ Support Package for supporting open source RISC-V cores designed by Western Digital. Codasip solutions are based on open standards including the RISC-V open ISA, LLVM and UVM to ensure compatibility and longevity. For more information, visit our website: www.codasip.com
Menta is a privately held company based in Sophia-Antipolis, France. For ASIC and SoCs designers who need fast, right-the-first time design and fast time to volume, Menta is the proven eFPGA pioneer whose design-adaptive standard cells-based architecture and state-of-the-art tool set provides the highest degree of design customization, best-in-class testability and fastest time-to-volume for SoC design targeting any production node at any foundry. For more information, visit the company website: www.menta-efpga.com