New Features Based on Extensive Feedback from the Growing Nios Processor Development Community
San Jose, Calif., February 18, 2003--Extending its embedded processor leadership even further, Altera Corporation (NASDAQ: ALTR) today announced the release of version 3.0 of the Nios® embedded processor, the industry's leading soft-core processor. The newest version of the Nios embedded processor includes features that take advantage of the advanced memory features on the high-performance Stratix™ and low-cost Cyclone™ device families for improved system performance, while delivering new tools for faster system development.
More than 10,000 Nios embedded processor hardware development kits have shipped to customers to date, confirming that the community of designers standardizing on Altera's soft-core processor for their embedded applications is growing at an unprecedented rate. It is this audience that has provided significant feedback to the feature set, user interface, and performance enhancements delivered in version 3.0 of the Nios embedded processor.
"We had previously used off-the-shelf processors in our designs, but we have since switched to the Nios processor for greater integration, more flexibility, and its ease-of-use," said Douglas Horne, vice president of research and development at BioMeridian. "Currently, we are using the Nios processor in our MSAS-Professional and MSAS-Partner products. These products are battery powered, which means reducing power consumption was a priority. The ability to add custom instructions to the Nios processor helped us achieve high data throughput while keeping the clock speed low enough to reduce power usage by 66 percent."
Nios Embedded Processor Version 3.0 Features
User-Configurable Caches: Version 3.0 of the Nios embedded processor includes user configurable, level one (L1) instruction and data caches that take advantage of the large dual-port memories on both the low-cost Cyclone and Stratix devices for higher performance system requirements.
Enhanced SDRAM Controller: Nios embedded processor developers can achieve single-cycle access to low-cost SDRAM devices at speeds above 100 MHz. The combination of the user-configurable L1 caches and SDRAM controller allows designers to use inexpensive, off-chip memory and achieve nearly the same performance for large memory requirements as running from high-performance, on-chip SRAM.
Enhanced Avalon Switch Fabric: The Avalon™ switch fabric, Altera's parameterized interface bus used by the Nios embedded processor, can now support pipelined data transactions to eliminate data bottlenecks. The support for posted-read and posted-write operations enables fast access to low-cost, external SDRAM devices, significantly improving the performance of complex processor subsystems.
New JTAG-Based Real-Time Debugger: The JTAG-based OCI® (On-Chip Instrumentation) core from First Silicon Solutions (FS2) included in the new version of the Nios embedded processor gives software developers a powerful tool for debugging real-time code. The OCI is accessed through a JTAG target connection and supports in-circuit emulator features such as complex hardware triggers and real-time trace.
Robust Integrated Development Environment: Support for Accelerated Technology's code|lab Developer Suite allows software engineers to quickly edit, compile, download, and debug their Nios processor-based code, providing native support for the advanced real-time debug and processor trace capabilities of the OCI debug core.
Network Protocol Software Library Included: Software support for many Ethernet protocols, including APR, IP, ICMP, TCP, UDP, and raw Ethernet formerly a $495 accessory kit is now included with Nios processor version 3.0.
Please visit www.altera.com/nios for complete details on the features included with version 3.0 of the Nios embedded processor.
"With this new release, software developers will be able to immediately benefit from the complete code|lab Developer Suite and Nucleus real-time operating system," said Robert Day, director of marketing for the Embedded Development Division of Mentor Graphics.
"The OCI that we developed for the Nios core provides a rich set of debug features normally associated with very expensive in-circuit emulators," said Rick Leatherman, president of FS2. "Equally important, the OCI is scalable, allowing designers to optimize the feature mix and gate count requirements for their particular design."
Craig Lytle, vice president of Altera's intellectual property (IP) business unit, commented on the growing Nios community, "Since its introduction in the Fall 2000, the Nios processor has become a huge success with many of our key customers having completed multiple Nios designs. More and more customers are jumping on the Nios processor bandwagon because they like the performance, flexibility, and cost. As a result of our ongoing dialogue with these customers, the Nios processor version 3.0 includes the features that they need and want the most."
Pricing and Availability
Active Nios embedded processor subscribers will receive version 3.0 immediately, and expired subscriptions can be renewed for only $495 to receive an additional one-year of updates. Version 3.0 of the Nios embedded processor will be shipping in March with the new Nios Development Kit, Stratix Edition, available for $995 from Altera and its distributors. The code|lab Development Suite, ISA-NIOS debug probe, ISA-NIOS/T trace probe, and Nucleus PLUS real-time operating system (RTOS), are available from Accelerated Technology at www.acceleratedtechnology.com.
About the Nios Embedded Processor
Altera's Nios embedded processor is the world's most widely licensed soft-core embedded processor today. The Nios embedded processor is a general-purpose RISC CPU that can be combined with a wide array of peripherals, custom instructions and hardware acceleration units to create a custom system-on-a-programmable-chip (SOPC) solution. The processor features a 16-bit instruction set and user-selectable 16- or 32-bit data paths, configurable for a wide range of applications. A typical 32-bit data path Nios processor consumes only $2.00 worth of logic in Altera's Cyclone devices, making it one of the lowest cost RISC processors available today. The Nios embedded processor is royalty free when used in Altera FPGAs and HardCopy™ devices. An ASIC license for OEM applications is available for an additional charge. For more information, visit www.altera.com/nios.
Altera Corporation (NASDAQ: ALTR) is the world's pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at www.altera.com.