AMD, TSMC & Imec Show Their Chiplet Playbooks at ISSCC

By Don Scansen, EETimes (February 26, 2021)

A lot has been said about the shift from a system-on-chip integration of functionality to a technology integrating each IP block as a physically distinct chiplet. Perhaps the emergence of this new paradigm is most aptly represented by the devotion of a full forum session to chiplets at the International Solid-State Circuits Conference. The virtual conference just wrapped up.

All eight of the forum (aka ISSCC Exploration) presentations offered an interesting look at chiplet technology. But three in particular provided an overview of the systems already on the market, the technology trends, and the ecosystem necessary to accelerate the new design approach.

AMD, Getting Started

AMD’s latest crop of microprocessors are well-known for their chiplet approach that optimized design and use of the most appropriate technology node for the chips. AMD senior vice president, corporate Fellow, and product technology architect Sam Naffziger presented the details of the motivations (wafer manufacturing technology slowing) and the challenges of breaking up their processors into purpose-built slices better matched to cutting edge and older technology nodes. The case study was the development of the EPYC server processor.

Naffziger pointed out that the idea of circuits comprised of multiple chips isn’t new. The multi-chip module (MCM) idea started back in the days of ceramic substrates and migrated to organic substrates. “The end of Moore’s Law plus packaging advancements create a new era for multi-chip/chiplet approaches.”

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