By Sally Ward-Foxton, EETimes (May 6, 2021)
IBM has unveiled the world’s first 2 nm chip, built at its R&D facility in Albany, New York. The test chip features gate-all-around transistors built with IBM’s nanosheet technology. Overall, IBM says the new process technology will enable 2 nm chips to achieve 45% higher performance or 75% lower power consumption than state-of-the art 7 nm chips in production today.
IBM was also first to demonstrate 7 nm and 5 nm test chips. The test chip IBM showed today features about 50 billion transistors and uses nanosheet structures as part of a gate-all-around (GAA) transistor, the new transistor architecture heralded as the solution to the scaling limitations of its predecessor, the FinFET.
FinFET was commercially introduced by Intel for the 22 nm node in 2011. GAA transistors replace FinFET’s fin with three wires, surrounded on all sides by the gate material. Surrounding the channel material like this allows better electrostatic control which in turn enables extremely small gate dimensions.
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