Solution Designed to Easily Integrate with P4 Pipelines in 5G Wireless and Cloud Data Center Networks
SAN JOSE, CA / ACCESSWIRE -- May 17, 2021 -- MoSys, Inc. (NASDAQ:MOSY), is focused on Accelerating Data Intelligence and provides both semiconductor and IP solutions that enable fast, intelligent data access for Cloud, networking, security and communications systems. Today, MoSys announced that it will be adding support for optimized P4 (Programming Protocol-Independent Packet Processors) pipeline acceleration to its Stellar Packet Classification Platform IP family. The solution, which is expected to be available to early access customers in Q3, 2021, can be easily integrated into P4 pipelines available from leading FPGA vendors.
"MoSys has long been a supporter of P4, and now we are adding P4 support to our Stellar Packet Classification Platform family of virtual accelerators, designed as IP that can be loaded into FPGAs," noted Michael Miller, MoSys' chief technology officer. "With this new milestone of enabling P4 support embedded in an FPGA, complex five tuple Access Control List (ACL) rule databases can be extended and accelerated using a combination of internal FPGA SRAM and HBM memories, thus enabling large databases of rules."
The P4 open source community (p4.org) is named after the four Ps as in a July 2014 whitepaper entitled, "Programming Protocol-Independent Packet Processors" and has been growing in significance ever since. With more than 80 industrial contributors and 12 academic contributors, it helps provide a protocol-independent methodology that specifies how devices like intelligent SmartSwitches or SmartNICs should process packets. Now, with the MoSys Stellar Packet Classification Platform solutions, designers will be able to increase capacity and performance by accelerating P4 processing directly in an FPGA.
The MoSys Stellar Packet Classification Platform is an innovative virtual accelerator that is based on the MoSys Graph Memory Engine (GME), which performs ultra-high-speed embedded search and classification of packet headers using ACL or LPM rules, thereby allowing TCAM-like functions to be replaced by FPGA-accelerated algorithms.
For more info on P4 - join the P4 workshop happening this week May 18-20, 2021 - see 2021 P4 Workshop
The MoSys Stellar Packet Classification IP is being designed to support a wide range of silicon, SmartNICs and SmartSwitches. MoSys also supports selected Intel and Xilinx FPGA families and products such as Intel® Stratix®10 and Xilinx® UltraScale+™.
The Stellar Packet Classification Platform IP targets:
- Routing - supports Longest Prefix Match (LPM) IPv4/IPv6 routing, including support for P4 and virtual routes for Cloud Data Centers, 5G User Plane Functions (UPF), P4 based systems, Network Classification, Carrier-Grade NAT, Broadband Network Gateways (BNG), NFVi, Flow Steering, L3 Forwarding and Filtering, vRouter, Open vSwitch Offload, and Cloud Gateways.
- Security, Load Balancing and Traffic Analysis - supports very complex, 10+ tuple Access Control List (ACL) type lookups for Network Firewalls, Allow/Deny Lists, P4 based systems, Network Detection and Response (NDR), Anomaly Detection, Lawful Intercept, Anti-DDoS, L4 Load Balancing, Application Delivery Controllers (ADC), Application and Network Analysis, Network Telemetry, Test and Measurement, Network Packet Brokers, and other markets and use cases.
About MoSys, Inc.
MoSys, Inc. (NASDAQ:MOSY) is focused on Accelerating Data Intelligence and provides both semiconductor and IP solutions that enable fast, intelligent data access and decision making for a wide range of markets including cloud networking, security, 5G networks, SmartNIC, test and measurement, and video systems. MoSys's Quazar family of high-speed memories and the Blazar family of Accelerator Engines are memory integrated circuits with unmatched intelligence, performance and capacity that eliminate data access bottlenecks to deliver speed and intelligence in systems, including those scaling from 100G to multi-terabits per second. MoSys's Stellar family of Virtual Accelerator Engines includes software, FPGA RTL and RISC-based firmware that accelerate applications and are portable across a wide range of hardware configurations with or without MoSys silicon chips. More information is available at: MoSys.