September 29, 2021 -- We are so proud to announce a new product that will join to our already extensive portfolio of networking IP Cores.
The new member of this family is the… 10G MTSN Switch IP Core! While SoCe is already leading the Time Sensitive Networking offering with the 1G MTSN Switch IP Core, we are very aware that the quick adoption of Ethernet based communications into multiple systems and markets that demand very high bandwidth capabilities has created a demand for higher speeds.
The new 10G MTSN Switch IP Core uses a totally redesigned switching architecture that has been designed with higher speeds in mind (used also in our 10G Managed Ethernet Switch), while still being compatible with legacy speed ports. This means, that it is compatible with Fast Ethernet, Gigabit Ethernet, and the new 2.5G/5G/10G interfaces.
It has been developed with the most advanced codifying techniques, and will *soon be available for anyone who is interested in this solution to be integrated within their products.
We would also like to recommend following carefully to our Relyum brand (https://www.relyum.com/web/) as new products will also be released that make use of this new technology.
Time Sensitive Networking
Time Sensitive Networking (TSN) is the name of the IEEE 802.1 Task Group responsible for standards at Data Link Layer. This group provides the specifications that will allow time-synchronized and low latency streaming services through IEEE 802 networks.
TSN is evolving and it is targeting different sectors, like Automotive, Industry, Broadcasting and Aerospace. Therefore, it is expected switching implementations that combine a subset of the available standards and features. This flexibility can be achieved through reconfigurable logic (FPGAs), HDL IPs and embedded software.
It sits on Layer 2 of the ISO/OSI Model. It adds definitions to guarantee determinism and throughput in Ethernet networks. The following are some of the IEEE standards that make up TSN:
Synchronization behavior (IEEE 802.1AS)
Preemption (IEEE 802.1Qbu)
Scheduled traffic (IEEE 802.1Qav, IEEE 802.1Qbv)
Seamless redundancy (IEEE 802.1CB)
Stream reservation (IEEE 802.1Q-2018)
Per-Stream Filtering and Policing (PSFP, IEEE 802.1Qci)
TSN IP Core
In SoCe, we are experts developing a portfolio of IP cores that implement the leading-edge networking, synchronization and security technologies for critical systems based on FPGA technology.
As we have been implementing solutions for networking and synchronization for critical systems for several years, we adopted TSN without difficulties.
Multiport Time Sensitive Networking (MTSN) Switch IP core is a flexible HDL code ready to generate TSN end-point or bridge implementations. The IP has been provided with a rich set of Generic parameters to obtain the best functionalities resources trade-off. These generic can be configured at VHDL level or graphically thanks to the GUI interface provided for Vivado IPI.
At SoCe we also develop hardware platforms in order to try out our technology. In this case, we offer the MTSNIP Core, a plug and play platform ready to run a TSN Network setup.
This kit has been designed not only to test the MTSNSwitch IP, but to support an advanced hands-on TSN as well.
SoCe is a worldwide leading supplier of time-aware Ethernet networking solutions. SoCeis pioneer in developing a portfolio of IP cores and end-devices that implement these technologies for critical systems.