By Gary Hilson, EETimes (November 1, 2021)
Like all iterations of DRAM, DDR5 will need an ecosystem of supporting technologies for it to become dominant, even as advanced workloads drive memory bandwidth requirements.
Rambus Incorporated is already laying the groundwork for DDR5 implementations more than a year away. The company recently announced it is sampling its 5600 MT/s 2nd-generation DDR5 registering clock drivers (RCD) to the major DDR5 memory module (RDIMM) suppliers. John Eble, vice president of product marketing for memory interface chips, said it will be several years before systems will be hitting the market. However, supporting technologies such as its RCD need to be evaluated and qualified by customers now so the ecosystem is ready to provide the bandwidth and capacity that will be required in next-generation data centers.
A DDR5 RCD along with data buffers (DB) are used in DDR5 Registered DIMMs (RDIMMs) and DDR5 Load Reduced DIMMs (LRDIMMs) to deliver higher bandwidth, performance, and capacity when compared to unbuffered DIMMs. RDIMMS, and LRDIMMs to reduce load on the CPU and improve the signal integrity of the command/address bus. The role of the RCD is as a key control plane chip which distributes Command/Address signals and clock to the DRAM devices on the DIMM. Rambus’ RCD can support DDR5 LRDIMMs when paired with 10n DB chips per module and reduces the effective load on the data bus to enable higher-capacity DRAMs on the module without reducing latency.
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