Library includes 16 new and enhanced high-performance DSP core such as Fast Fourier Transform and world's fastest FPGA Viterbi Decoder
SAN JOSE, Calif., April 2, 2003 - Xilinx, Inc. (NASDAQ: XLNX) today announced the immediate availability of its latest digital signal processing (DSP) intellectual property (IP) cores. The release includes a new parameterizable, high-performance Fast Fourier Transform (FFT) solution that is ideal for Orthogonal Frequency Division Multiplexed (OFDM) systems. Additionally, the release includes significant enhancements to several existing IP cores, including the general purpose Viterbi Decoder the Multiply-Accumulate-based Finite Impulse Response (MAC FIR) Filter, the Direct Digital Synthesizer (DDS), and the CORDIC. When used with the extensive library of existing Xilinx IP cores, these new and enhanced cores enable designers to take advantage of key features within Xilinx FPGAs to create cost effective digital communication systems. For complete information about the new cores and the Xilinx XtremeDSP initiative, visit www.xilinx.com/dsp. The cores will also be demonstrated at the upcoming Programmable World 2003 (www.xilinx.com/pw2003).
"This new release reinforces Xilinx's leadership position in the software defined radio and digital communications area," said David Squires, director of the DSP Center of Excellence at Xilinx. "These cores enable our customers to use Xilinx-specific FPGA features like our SRL16 to increase the performance and efficiency of their designs."
New High-Performance FFT
The new FFT core provides a high-performance solution for customers developing OFDM wireless and wireline systems. The FFT core meets the challenging performance and numerical requirements of military radar imaging systems, including Inverse Synthetic Aperture Radar (ISAR). Additionally, the new core enables system designers to make important tradeoffs between FPGA footprint and performance, supporting data processing of 200 Mega-samples/sec and transform lengths between 16 and 16,384 points.
World's Fastest FPGA Viterbi Decoder
This release also includes significant enhancements to the general purpose Viterbi Decoder, making it the world's fastest FPGA-based Viterbi Decoder. Using the industry standard constraint length of 7, this parameterizable core achieves decoding rates of 199 MSPS for a single channel and 273 MSPS for multi-channel designs. By taking advantage of the unique Xilinx FPGA device features like the SRL16, the enhanced core provides multi-channel Viterbi Decoding. This design improvement means the same area once required for a single Viterbi Decoder can now be used to decode 32 convolutionally encoded data streams. The enhanced core also provides support for Trellis code modulation and reduced latency decoding. Additionally, designers can select between serial and parallel implementations, providing them with the most cost effective design for their application.
This release also includes several enhanced cores, enabling users to achieve better performance while using fewer FPGA resources:
- DDS supplies multi-channel capability, ideal for implementing an array of Digital Down Converters (DDC) and Digital Up Converters (DUC)
- MAC FIR provides a system-level view of the FPGA multiplier array and constructs a multi-MAC implementation based on the available FPGA master clock frequency and required filter sample rate, significantly simplifying the development of high-performance FIR filters
- CORDIC provides the user with more control over the implementation of the core, allowing the designer to specify key parameters such as the instantiation of the coarse rotation module, the number of implemented iterations, and the desired internal precision, simplifying the design of the carrier recovery loop in a QAM demodulator
Price and Availability
All cores are available now and are downloadable over the web at www.xilinx.com/dsp. The majority of the cores in this release are included with the latest version of the Xilinx CORE GeneratorTM System. The general purpose Viterbi Decoder is licensed separately, as a parameterizable netlist priced at $5,000. A full system hardware evaluation version of the Viterbi Decoder is available at http://www.xilinx.com/ipcenter/ipevaluation/index.htm. All the cores in this release support the latest Xilinx Virtex and Spartan Series FPGAs and ISE 5.2i, the latest Xilinx design software.
Xilinx XtremeDSP Initiative
Today's announcement represents yet another milestone in the Xilinx XtremeDSP initiative and further extends the company's leadership position in high-performance DSP solutions. The Xilinx commitment to the importance of DSP technology resulted in the company's XtremeDSP initiative over two years ago. For additional information on the Xilinx XtremeDSP initiative, visit www.xilinx.com/dsp.
Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader of programmable logic and programmable system solutions. Additional information about Xilinx is available at www.xilinx.com.