Quickly And Exhaustively Verifies Chips With Arithmetically Complex Logic
MILPITAS, Calif., April 21, 2003 -- To answer the challenge of formally verifying designs that have compiled datapath circuitry, Verplex™Systems Inc. today announced an industry first with Conformal™Datapath (DP), a new component of its family of formal verification products.
Conformal DP addresses verification challenges faced by teams developing timing critical applications such as graphics, multi-media, DSP, and communications, which often require advanced datapath optimization. It was specifically designed to verify the complex optimized datapath circuitry produced by high performance datapath and synthesis tools.
"Verplex is the first to offer a complete solution that enables designers to verify complex datapath blocks," says Andy Lin, Verplex vice president of engineering. "Without equivalence checking, designers have to rely on simulation with all of its drawbacks such as challenging debug, degraded quality of verification, increased risk of expensive silicon re-spins due to missed bugs, and unbearably long run times often leading to schedule delays.".
According to Lin, datapath has always been a difficult challenge for equivalence checking due to the complexity of formally verifying complex arithmetic operators. It is becoming even more challenging due to Electronics Design Automation (EDA) vendors incorporating datapath capability into standard synthesis tools to help engineers meet their timing requirements. "Verification engineers and hardware designers are increasingly asking for the capability to formally verify designs that have gone through complex arithmetic optimizations."
Synthesis design tools have grown so complex that an independent verification tool, such as Conformal DP, is needed to audit the process by which they generate circuitry, ensuring correct synthesis results. Other formal verification tools are not independent, and may require "side files," or data clandestinely passed from the synthesis tool, in order to verify the circuits. This greatly increases the risk that the formal verification tool uses the same assumptions that were made during the synthesis process, causing it to miss bugs introduced by the synthesis tool.
"Conformal DP has proven to be very effective in verifying our designs that have gone through complex arithmetic optimizations," remarks Hiroshi Furukawa, assistant manager, System-on-a-Chip Design Division of NEC Micro Systems in Japan. "Verifying datapath circuits has been very difficult and time consuming in the past, but we have found Conformal DP to be very efficient in comparing different types of datapath circuits."
With Conformal DP, designers can reliably verify datapath blocks using equivalence checking, doing away with simulation as a stopgap measure. As a result, design teams can now confidently and exhaustively verify datapath circuits with the proven accuracy of equivalence checking.
Conformal DP Feature Summary
Verplex's Conformal DP is capable of handling a wide variety of datapath structures required for high performance designs. A summary of key features includes:
- Automatically Verifies Flat Datapath Modules: Designers often flatten their designs during back-end processing and optimization. Using Conformal DP, designers can easily verify flat datapath structures without specifying boundaries or architectures in the flattened netlist, eliminating a tedious, time-consuming and error-prone process.
Automatically Verifies Merged Operators: Datapath synthesis uses operator-merging techniques that produce faster and smaller circuits compared to traditional synthesis, which uses distinct (non-merged) operators. But merging operators has prevented equivalence checking from working, until the recent advent of Conformal DP.
Carrysave Verification: Datapath synthesis can introduce carrysave transformations during optimization for sequences of adders, multipliers and registers. However, this can cause register-matching problems that prevent equivalence checking from working. Using Conformal DP, designers can now verify circuits containing carrysave transformations.
While other equivalence checkers handle only portions of a design, Conformal DP extends support to complex synthesized datapath. With the addition of datapath capability, the Conformal family of equivalence checking products offer a comprehensive package for complete and independent system-on-chip (SoC) verification. Designers can perform datapath verification using the same Verplex environment that has previously scaled to address their needs in embedded memory, custom I/O, hard intellectual property (IP), custom logic needs, as well as any other future complex verification requirements.
Pricing and Availability
Conformal DP is available now and is sold as an add-on to Verplex's Conformal Logic Equivalence Checker. It is supported on Hewlett Packard HP-UX, Sun Microsystems Solaris™, IBM AIX™, and Linux operating systems platforms. The U.S. price for a three year, time-based license is $45,600 per year.
More information on Conformal DP and other Verplex software products can be found at http://www.verplex.com, or contact Tony Larson, vice president of marketing at Verplex. He can be reached at (408) 586-0300.
Verplex Systems Inc. is an electronic design automation (EDA) company focusing on delivery of the highest speed, highest capacity and easiest to use formal verification products for complex system-on-chip (SOC) design. Founded in 1997, it is privately held and funded by leading venture capital firms. Corporate headquarters is located at 300 Montague Expressway, Suite 100, Milpitas, Calif. 95035. Telephone: (408) 586-0300. Facsimile: (408) 586-0230. Online information is found at its Web Site: http://www.verplex.com.
Verplex, BlackTie and Conformal are trademarks of Verplex Systems Inc. All other companies and products referenced herein are trademarks or registered trademarks of their respective holders.