Code:DSP Development Solution Enables System Designers to Build FPGA Co-Processors to Lower Design Costs and Improve System Performance
San Jose, Calif., April 30, 2003-- Altera Corporation (NASDAQ: ALTR) today introduced version 2.1 of its industry-leading DSP Builder digital signal processing (DSP) development tool that integrates The MathWorks' MATLAB and Simulink DSP development software with the Quartus® II FPGA design environment. Version 2.1 extends DSP Builder's capabilities to enable FPGA co-processor development in concert with Altera's SOPC Builder system development tool, allowing designers to build systems that both increase the performance and lower the component costs of complex signal processing applications including wireless, image processing, medical equipment, and software-defined radio (SDR) systems.
DSP Builder and FPGA co-processors will be highlighted in Altera's Code:DSP System Architecture Solutions seminar series. For more information, or to sign up for a seminar, visit www.altera.com/codedsp.
"DSP Builder enables me to use FPGAs in power supply control applications where I could never use programmable logic before," said Peter Markowski, principal design engineer of the enterprise computing group at Artesyn Technologies. "As an analog designer, I find DSP Builder and Quartus II tools intuitive and easy to use, especially since they allow me to continue with my established MATLAB and Simulink design flow without requiring me to learn any hardware description languages. By choosing Altera's Code:DSP solution, we expect to achieve better performance than any DSP processor alone could provide, as well as lower our costs, increase integration and reliability, and save engineering time."
"The integration between The MathWorks' Simulink, Altera's DSP Builder and SOPC Builder creates a powerful environment for system design to hardware and software implementation," said Ken Karnofsky, director of DSP and communications marketing at The MathWorks. "Using MATLAB and Simulink with Altera's new FPGA co-processor technology will unleash the strong synergy between DSP processors and the strengths of FPGAs."
User-defined FPGA co-processors can be developed quickly with DSP Builder and can be automatically implemented directly into an Altera FPGA or exported to Altera's SOPC Builder system integration tool for further integration into the overall system architecture. Simulink with DSP Builder then automatically generates a system-level test bench for verifying the resulting system implementation. FPGA co-processors enable software-based systems to leverage the huge processing capabilities afforded by FPGAs.
"Software developers have traditionally used co-processors to off-load algorithms such as forward error correction and filtering," said Paul Ekas, senior marketing manager responsible for Altera's DSP strategy. "Unfortunately, processor vendors have not been able to provide more than a few co-processor enhanced DSPs to their customers. With DSP Builder, companies can leverage FPGA-based co-processors with their proprietary algorithms to dramatically increase system performance and lower overall component costs."
Pricing and Availability
Altera's DSP Builder version 2.1 is available now to customers with a current DSP Builder subscription. Subscription pricing is $1,995 and includes 12 months of software upgrades. A download of the DSP Builder tool is available for a free 30-day evaluation from Altera's DSP solutions center at www.altera.com/dsp. Simulink and MATLAB are available today from The MathWorks at www.mathworks.com. DSP Builder version 2.1 will be shipping with up-coming releases of Altera's DSP Development Kit.
About SOPC Builder
SOPC Builder is a system development tool that automates the system definition and integration phases in the development of a system-on-a-programmable-chip (SOPC) solution, dramatically simplifying the task of creating these complex designs and significantly reducing the time-to-market for new products. Using SOPC Builder, system designers can define a complete system, including both hardware and software, with one tool and in a fraction of the time required by traditional system-on-a-chip (SOC) design approaches. The tool is integrated into Altera's Quartus II software. SOPC Builder provides designers with a powerful platform for use in building bus-based systems out of common system components.
About The MathWorks
The MathWorks is the world's leading developer of technical computing software for engineers and scientists in industry, government, and education. With an extensive product set based on MATLAB and Simulink, The MathWorks provides software and services to solve challenging problems and accelerate innovation in automotive, aerospace, communications, financial services, biotechnology, electronics, instrumentation, process, and other industries. The MathWorks was founded in 1984 and employs more than 1,000 people worldwide, with headquarters in Natick, Massachusetts. For additional information, visit www.mathworks.com.
Altera Corporation (NASDAQ: ALTR) is the world's pioneer of system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at www.altera.com.