The HyperTransport Tunnel, Cave, Host and Bridge Link Controllers Accelerate the Development of ICs and FPGA-based Systems
San Jose, Calif. – May 6, 2003 – GDA Technologies, Inc, a fast growing supplier of Intellectual Property and Design Services, today announced the availability of a comprehensive set of HyperTransport IP cores for ASIC integration and FPGA-based solutions. The IP offerings include two sets of HyperTransport Tunnel, Cave, Bridge, and Host link controllers. One set is optimized for ASIC implementations and one for FPGA integration. With its products and its Electronic Design Services, GDA Technologies enables system designers for networking, communications, storage, and high performance systems to greatly reduce development time by using a set of re-useable HyperTransport IP cores and its related services. GDA Technologies Electronic Design Services include designing and developing software and hardware validation platforms and performing interoperability testing where conforming to the latest HyperTransport specification is critical to getting silicon and systems to market quickly and successfully.
"This is an impressive achievement for GDA and a significant move forward for the HyperTransport industry" said Gabriele Sartori, President of the HyperTransport Technology Consortium. "Providing complete library of HyperTransport IP cores enables designers to minimize design risks, reduce time to market and development cost in implementing high-performance HyperTransport technology based products."
"These new HT IP products are particularly significant to larger customers, because they will make it simpler to add HyperTransport technology to custom ASICs or FPGAs," adds Jim Turley, senior analyst at Silicon Insider. "Now large OEMs can develop inexpensive FPGA products, and then perhaps migrate them into HyperTransport-enabled custom ASIC devices."
"GDA understands the challenges of designing bandwidth-intensive solutions and has created a library of IP cores to assist ASIC and system designers accelerating their development time" said AG Karunakaran, President of GDA Technologies. "We are the first company to offer a full family of HyperTransport IP cores and its associated services. It is an excellent demonstration of our capabilities as an IP and Electronic Design Service provider."
HyperTransport technology is an advanced high-speed, low latency, and point-to-point link for integrated circuits. HyperTransport provides a universal connection that is designed to reduce the number of buses within the system, provide a high-performance link for embedded applications, and enable highly scalable multiprocessing systems. HyperTransport enables the chips inside of PCs, networking and communications devices to communicate with each other at a much higher speed than the existing technologies.
The HyperTransport IP cores from GDA are fully compliant to the latest HyperTransport specification. They are designed for reuse and their flexible backend interfaces allow them to be easily integrated into wide range of applications. Some of the key features of the HyperTransport IP cores are:
- Compliant to the latest HyperTransport I/O Link Specification
- Offers complete HyperTransport topologies:
- Supports wide range of bandwidth: 6.4 – 51.2 Giga bits/s aggregated bandwidth
- Optimized for:
- Standard Cell
- Gate Array
- Have performed extensive interoperability testing with HT PHY partners:
Provides roadmap to future HyperTransport specification revisions
GDA has a broad portfolio of foundry independent IP cores available for Computing, Networking, and Signal Processing applications. As part of the IP licensing package, GDA provides extensive set of documentations and customer support. The IP package consists of Verilog RTL code, Verification environment, Test cases as well as detailed design documentations. In addition to the IP library, GDA offers a suite of design services for customization and integration of the IP cores into customer's ICs and FPGAs. For additional information about GDA's IP cores and intellectual property licensing program, please visit www.gdatech.com
. About GDA Technologies, Inc.
GDA Technologies, Inc. is a leading design services company specializing in embedded, networking and consumer electronic designs. GDA focused on designing Systems, Boards, SOCs, ASICs, FPGAs and IPs from concept to product. GDA has successfully developed products in areas of Networking, Digital Video, Internet Appliances and Hand Held Solutions. GDA is headquartered in San Jose, CA and has satellite design centers in Sacramento, Boston, Chennai and Bangalore. GDA's web site is at www.gdatech.com
. About HyperTransport™ Technology
HyperTransport universal chip-to-chip interconnect technology replaces and improves upon existing multilevel buses used in systems such as personal computers, servers and embedded systems while maintaining software compatibility with PCI I/O technologies. HyperTransport technology delivers a maximum 12.8 GB/second aggregate bandwidth using easy to manufacture dual, unidirectional point-to-point links. Enhanced 1.2V low-power LVDS signaling and dual-data rate data transfers deliver increased data throughput while minimizing signal crosstalk and EMI. HyperTransport interconnect technology employs a packetized data protocol to eliminate many sideband signals (control and command signals) and supports asymmetric, variable width data paths. About the HyperTransport™ Technology Consortium
The HyperTransport Technology Consortium is a non-profit organization managed by its members that is dedicated to promoting HyperTransport technology as an open, freely available industry standard for high bandwidth chip-to-chip communications. Membership in the consortium is open to any industry participant for a modest administrative fee and includes the rights to royalty-free use of HyperTransport technology Intellectual Property. More information can be obtained from the HyperTransport Technology Consortium website at www.hypertransport.org
. HyperTransport is a licensed trademark of the HyperTransport Technology Consortium.