Leverages new Xilinx RocketPHYTM 10 Gbps physical layer transceiver devices for flexible PHY framer solution
SAN JOSE, Calif., May 6, 2003 - Today at Programmable World 2003, Xilinx, Inc., (NASDAQ: XLNX) and Paxonet Communications, a Xilinx AllianceCORE partner and leading telecommunications IP provider, announced the immediate availability of an optimized version of Paxonet's GFP (Generic Framing Procedure) core for use in Xilinx Virtex-II, and Virtex-II Pro FPGAs. The GFP core, when combined with Virtex-II or Virtex-II Pro devices and a Xilinx RocketPHY™ 10 Gbps physical layer transceiver (see today's related news), forms a complete PHY MAC interface. This represents the industry's first 10 Gbps GFP solution for programmable systems design that is also compliant with the STS-192 SONET jitter specification.
"Combining Paxonet's wide range of Telecom IP cores with Xilinx's industry-leading FPGAs and RocketPHY transceiver technology allows customers to build flexible, customizable solutions more cost effectively and in less time than with an ASSP," said Kevin Wayne Williams, vice president of marketing at Paxonet. "This core provides a flexible 10 Gbps solution for Metro Area Network applications including multi-service switches, add-drop multiplexers, digital cross connects, traffic aggregators, and test equipment."
The new core is compliant with ITU-T G.7041/Y.1303 specifications and available for use in Xilinx Virtex-II and Virtex-II Pro devices. Combined with RocketPHY transceivers, the solution offers the industry's first non-ASIC solution for supporting full 10 Gbps GFP capability on programmable logic devices. It also expands the range of STS-192 SONET/SDH and 10 Gigabit Ethernet solutions available from Paxonet for use in Xilinx devices.
"Xilinx is the only FPGA company in the industry to offer 10 Gbps SONET OC-192 compliant devices that are available today," said Robert Bielby, senior director of Strategic Solutions Marketing at Xilinx. "With the introduction of Xilinx's RocketPHY physical layer transceiver family and the Paxonet GFP cores, we lead the industry in providing a complete range of SONET solutions extending to 10 Gbps line rates."
GFP Core Availability
The GFP Core is immediately available from Paxonet Communications. For more information, visit www.xilinx.com/ipcenter or www.paxonet.com. These products can be licensed from Paxonet Communications under the terms of the Xilinx SignOnce IP License, the industry's first multi-vendor common license for FPGA-based IP (www.xilinx.com/ipcenter/signonce.htm).
About Rocket PHY
The Xilinx RocketPHY family of transceivers meet OC-192 SONET/SDH STM-64, FEC (G.709), 10 Gigabit Ethernet, and emerging 10 Gigabit Fibre Channel standards. The RocketPHY family is also compliant with industry LAN, WAN, SAN and MAN standards including ITU-T, OIF and IEEE 802.3ae. The family of 10 Gbps serial to 16-bit devices support operation from 9.9532 - 10.709 Gbps. The parallel side interface of the RocketPHY family is directly compliant with Xilinx Virtex-II Pro FPGAs and other industry standard framers and MACs through XSBI and SFI-4 (OIF99.102) 16 bit differential LVDS interfaces. Additional information about RocketPHY can be found at www.xilinx.com/rocketphy.
Paxonet Communications, Inc., designs, develops and markets silicon solutions for interworking metro networking technologies to SONET. Paxonet offers the MetroConnect line of integrated circuits and the CoreEl line of specialized IP cores focused on the metro market. By offering a full range of interoperable ICs and IP cores, Paxonet enables customers to offer highly differentiated, low cost solutions with a quicker time-to-market. For more information about Paxonet and its products, visit www.paxonet.com.
Xilinx is the worldwide leader of programmable logic solutions. Additional information about Xilinx can be found at http://www.xilinx.com.