SUNNYVALE, Calif.--(BUSINESS WIRE)--May 19, 2003--TNI-Valiosys, a technology leader in verification tools, and Verisity Ltd. (Nasdaq:VRST), the leading supplier of essential technology and methodology for functional verification, today jointly announced the availability of a flow in which TNI-Valiosys' imPROVE-HDL static property checker is interfaced to Verisity's Specman Elite(R) testbench automation solution, combining static property checking and testbench automation to boost the quality and time-to-market of SOC designs.
"Highly interoperable solutions are the cornerstone of successful verification for system-level designs," said Dave Tokic, Director of Strategic Marketing for Verisity. "Users need to be able to select the best tools in each verification class. Our integration with TNI-Valiosys provides our joint customers with an integrated solution for static property checking and testbench automation."
"We have succeeded in making Assertion-Based Verification practical, robust and efficient," said Marc Frouin, TNI-Valiosys President and C.E.O. "Our joint customers have now access to a verification solution that significantly enhances the quality of their designs while reducing their overall time-to-market."
TNI-Valiosys' imPROVE-HDL is an assertion-based static formal property checker that complements simulation in exhaustively finding the "hard" bugs found in controller-based and protocol-based SOC designs. Questions regarding design intent, such as expected functionalities, unwanted behaviors, or design properties, are expressed as assertions. Together with the RTL design, the assertions are then provided as inputs to imPROVE-HDL. The tool automatically computes a test-sequence that either illustrates or violates the requested assertion; or else makes an exhaustive search to prove that the property shall always hold true.
imPROVE-HDL readily fits into an assertion-based flow. It perfectly complements dynamic techniques and test generation techniques in improving functional coverage. No testbenches are needed, and the assertions can be reused from simulation. Time is saved, while "hard-to-catch" bugs are found before silicon, avoiding costly respins. imPROVE-HDL comes with an assertion library covering widely used protocols, such as OCP, AHB, PCI-X and PCI-Express. The tool supports VHDL/Verilog, OVL, PSL, OVA and the e language.
Verisity's Specman Elite is a testbench automation solution that dramatically speeds the verification process and ensures high quality designs. Specman Elite automates what were traditionally manual processes and detects critical flaws in hardware designs. Specman Elite offers a comprehensive environment for all aspects of verification, including automatic generation of functional tests, data and assertion checking and functional coverage analysis. Using Specman Elite, designers can capture the rules from the specifications and use this information to automate the functional verification process. Specman Elite finds hard-to-reach bugs caused primarily by ambiguities in the spec, or unanticipated usage by the target system.
imPROVE-HDL / Specman Elite Flow
Starting with imPROVE-HDL, users would formally specify as assertions the block's functionalities, its properties, and the constraints on its environment. This can be done using either assertions in the e verification language, or imPROVE-HDL's native property and constraint assertion mechanism, called PEC. imPROVE-HDL will then use these assertions to quickly debug the design.
The next step is to switch to Specman Elite. Assertions are translated from PEC to the e language, or directly reused if written in the e language. In order to obtain a good set of properties, users can easily cross-check the environment descriptions between the tools. Test sequences computed with imPROVE-HDL are then translated into e language testbenches to be added to the functional coverage metrics of Specman Elite.
Finally, to further enhance coverage, the user can identify interesting states along the Specman Elite/HDL simulation trace and begin an exhaustive search using imPROVE-HDL. Using this semi-formal mode available in imPROVE-HDL, users can augment the functional coverage originally obtained with Specman Elite, and potentially uncover new corner-cases.
"The advantages of the flow to our joint customers are two-fold," continued Marc Frouin. "It integrates formal verification and simulation-based verification in a cooperative and transparent way, and on top of that, the functional specification needs to be formalized only once in the e verification language, which significantly saves time and reduces discrepancies."
The Specman Elite interface will be included with version 2.2 of imPROVE-HDL in June, 2003. A no charge upgrade is available to customers on maintenance.
TNI-Valiosys is a technology leader in verification tools and a provider of embedded software development and EDA tools that help engineers in semiconductors and systems companies more effectively model and validate their designs. TNI-Valiosys' unique formal verification products help build better quality IPs in a shorter amount of time, leading to superior ROI, improved customer satisfaction and new design wins for our customers. For designs involving complex SOC bus, memory or peripherals controllers, the imPROVE-HDL static property checker allows to exhaustively debug specifications and RTL models in complement of simulation. For designs involving full-custom blocks, the imPROVE-TLL abstraction tool abstracts the transistor-level circuits into equivalent gate-level models for faster functional verification.
TNI-Valiosys employs 80 people worldwide. The company has sales offices in North America and Europe, and local representatives in Japan and Taiwan. For more information, visit www.tni-valiosys.com.
Verisity, Ltd. (Nasdaq:VRST), is the leading supplier of essential technology and methodology for the functional verification market. The company addresses customers' critical business issues with its market-leading software and intellectual property (IP) that effectively and efficiently verify the design of electronic systems and complex integrated circuits for the communications, computing, and consumer electronics global markets. Verisity's Specman Elite(R) testbench automation solution automates manual processes and detects critical flaws in hardware designs enabling delivery of the highest quality products and accelerating time to market. The company's strong market presence is driven by its proven technology, methodology, and solid strategic partnerships and programs. Verisity's customer list includes leading companies in all strategic technology sectors. Verisity is a global organization with offices throughout Asia, Europe, and North America. Verisity's principal executive offices are located in Mountain View, California, with its principal research and development offices located in Rosh Ha'ain, Israel. For more information, visit www.verisity.com.
Note to Editors: Verisity and Specman Elite are either registered trademarks or trademarks of Verisity Design, Inc. in the United States and/or other jurisdictions. All other trademarks are the property of their respective holders.