English
Frontgrade Gaisler and RISC-V's Space Journey
By Chad Cox, Embedded Computing Design (January 18, 2024)
The last time we spoke with Sandi Habinc, General Manager, and Jan Andersson, Director of Engineering at Frontgrade Gaisler, we were discussing the TRISAT-R CubeSat and Gaisler’s use of RISC-V’s open standard instruction set architecture within its space deployment.
What Has Happened Since?
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related News
- RISC-V in Space Workshop 2025 in Gothenburg
- RISC-V in Space Workshop 2025 in Gothenburg
- Frontgrade Gaisler Leads the Way in RISC-V Processor Development for Space Applications
- Frontgrade Gaisler Licenses BrainChip's Akida IP to Deploy AI Chips into Space
- Cobham Gaisler successfully verifies its first RISC-V processor, NOEL-V, using Aldec's Riviera-PRO for HDL Simulation
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation