Scalable Extreme-Speed IPsec Added to Xiphera's Security Protocols Portfolio
The IPsec IP core complements Xiphera’s Security Protocols offering, bringing proven security for the critical layers 2-4 of the OSI model
March 5, 2024 -- Xiphera releases extreme-speed IPsec (Internet Protocol security) IP (Intellectual Property) core. The new IP core completes the Security Protocols family providing protection for the layers 2, 3, and 4 of the OSI model. IPsec, on layer 3 (also known as the Network layer), secures the network traffic on the Internet Protocol layer, authenticating and encrypting Internet Protocol packets within a communication session.
IPsec protocol is widely used in various operating systems and network devices. It is most commonly used to secure communications in Virtual Private Networks (VPNs) over the Internet. Today’s hybrid and remote work environments are an excellent example of the importance of secure communications – IPsec secures network-to-network communications e.g. between sites, data centers, and businesses.
Internal high-level block diagram of Xiphera’s extreme-speed IPsec (XIP7013E).
Xiphera’s extreme-speed IPsec IP core implements the ESP (Encapsulating Security Payload) frame processing of the IPsec protocol, using Xiphera’s own AES256-GCM IP core as its crypto engine to protect data confidentiality and integrity as well as data origin authentication. The IPsec core achieves a throughput exceeding 200 Gigabits per second (Gbps) in modern high-end FPGAs and ASICs, making it an excellent solution to secure traffic on links from 10 to 200 Gbps.
“Our IPsec offers scalable solution to meet the needed performance requirements by acheiving full throughput with wanted linerate despite packet sizes. Latency of the IP is fixed, which is vital for timing critical applications”, says Tuomo Tarvainen, Xiphera’s System Architect.
For more information, visit the IPsec product page, or open the full product brief.
|
Xiphera Ltd. Hot IP
Related News
- Xiphera Announces Support for Extreme-Speed IPsec
- Intrinsic ID's Scalable Hardware Root of Trust IP Delivers Device Authentication for IoT Security in NXP LPC Microcontroller Portfolio
- Xilinx & Sensory Networks Announce Industry's Most Scalable, FPGA-Enabled Network Security Acceleration Solution For Emerging UTM Security Appliances
- K-Micro (Kawasaki Microelectronics) Licenses SafeNet's SafeXcel IP Security Engines for its ASIC IP Portfolio
- Altera Ships Industry's First Complete Internet Protocol Security (IPSec) Solution
Breaking News
- AiM Future Brings GenAI Applications to Mainstream Consumer Devices
- Axiomise Names Two Executives to Newly Formed Technical Advisory Board
- GDDR7 Adds Headroom to Meet AI Pressures
- Esperanto Technologies and Rapidus Partner to Enable More Energy-Efficient Designs for the Coming "Post GPU Era"
- Actions Technology's smart watch SoC adopted VeriSilicon's 2.5D GPU IP
Most Popular
- Andes, HiRain, and HPMicro Join Hands to Build RISC-V AUTOSAR Software Ecosystem
- Esperanto Technologies and Rapidus Partner to Enable More Energy-Efficient Designs for the Coming "Post GPU Era"
- New Automotive Grade Linux Platform Release Adds Cloud-Native Functionality, RISC-V Architecture and Flutter-Based Applications
- Is Graphcore Deal Finally About to Close?
- ADTechnology and ANAFLASH to Team Up for Embedded Vision Summit (EVS) showcase
E-mail This Article | Printer-Friendly Page |