Unique Architecture Ideal for Area-Limited Consumer Applications Requiring Lower Power
TOKYO, Japan and FREMONT, Calif., June 9, 2003 -- Virage Logic (Nasdaq:VIRL), a leading provider of best-in-class semiconductor IP platforms, today announced the addition of an Ultra-High-Density (UHD) standard cell library to its silicon-proven Area, Speed and Power (ASAP) LogicTM product line. Providing up to a 30 percent improvement in logic block area utilization while typically consuming up to 20 percent less power when compared to conventional standard cell architectures, the ASAP Logic UHD cell library is ideal for high volume consumer applications.
"We worked closely with Virage Logic to develop the UHD cell architecture specification that would provide us with the best area, power and performance trade-off," said Hisaya Keida, director of IC technology and mixed-signal development, Kawasaki Micro systems electronics. "We are very satisfied with the quality of the library and their level of professional expertise. Working with Virage Logic has been an extremely positive experience, which I believe no other IP company could match."
Leveraging on Virage Logic's patented routing and cell architecture, the ASAP Logic UHD Library elements are considerably smaller than those of conventional standard cell libraries while delivering more routable results. Since it is more than 20 percent smaller in cell height than typical standard cells, the combination of smaller device capacitance and shorter wire lengths results in 20 percent less power consumption.
"The addition of this unique ultra-high-density standard cell library to our ASAP Logic product line strengthens our overall semiconductor IP platform offering," said Brani Buric, senior director of product marketing, Virage Logic. "Although the UHD library is ideal for consumer applications, it also benefits any area-limited design because it provides a significant improvement in area utilization."
About The ASAP Logic Product Line
The Virage Logic ASAP Logic product line contains application-optimized libraries targeted to unique market requirements and is based on Virage Logic's proprietary and patented routing methodology and cell architecture.
- ASAP Metal Programmable Cell Libraries are used in System-on-Chip (SoC) designs to economically enable functional reprogrammability by changing only a few metal and via masks. This approach has significantly helped overcome a key barrier to low- and medium-volume SoC implementation –– high mask costs –– without causing any performance degradation.
- ASAP Standard Cell Libraries are optimized for area, speed, and power and provide up to a 30 percent increase in utilization when compared to conventional standard cell libraries.
About Virage Logic
Virage Logic Corp. (Nasdaq:VIRL) is a leading provider of best-in-class semiconductor IP platforms based on memory, logic, I/Os, and IP development tools that are silicon proven and production ready. Virage Logic meets market demands for cost reduction, while improving performance and reliability for fabless and integrated device manufacturer (IDM) companies focused on the consumer, communications and networking, handheld and portable, and computer and graphics markets. Virage Logic is headquartered in Fremont, California and has sales and support offices worldwide. For more information, visit www.viragelogic.com or call (877) 360-6690 toll free or (510) 360-8000. Virage Logic's Tokyo, Japan office can be reached by calling +81-3-5403-4751.
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