New Technology-Optimized Platform Helps Cut Costs, Ease Design Complexity and Enable Shorter Design Cycles
FREMONT and MILPITAS, Calif., June 23, 2003 - Virage Logic Corp. (Nasdaq: VIRL), a leading provider of best-in-class semiconductor IP platforms, today announced it will make available its Technology-Optimized Platform on Chartered Semiconductor Manufacturing's 0.13-micron baseline logic process. In support of Virage Logic's platform strategy, this latest development furthers a successful alliance between the two companies, which currently features the availability of silicon proven embedded memories on multiple technology nodes from 0.35 micron down to 0.13 micron. The new Technology-Optimized Platform for the Chartered 0.13-micron process will be available in September 2003.
Virage Logic's Technology-Optimized Platform - comprising silicon proven memories, logic, and I/Os - provides System-on-Chip (SoC) designers the capability to manufacture on Chartered's 0.13-micron process with enhanced performance and accuracy.
In addition to the Technology-Optimized Platform for Chartered's 0.13-micron baseline logic process, Virage Logic also announced today the availability of embedded memories for Chartered's 0.13-micron low-leakage offering. Additional components for Chartered's derivative processes will also be made available to allow customers to mix and match solutions to better address their specific performance and power requirements.
"As more companies face increasingly greater time-to-market requirements and address design challenges at 0.13-micron, Chartered is committed to working closely with industry-leading partners to offer proven design solutions to our customers," said Kevin Meyer, vice president of worldwide marketing and services at Chartered. "With Virage Logic's proven track record in providing quality and reliable semiconductor IP, we believe that our alliance with Virage Logic will provide Chartered customers access to competitive technical solutions from a trusted single source. And our collaboration with Virage Logic on multiple process offerings will enable companies to mix and match IP for a design solution that best suits their needs from a performance perspective."
"As a long-time Chartered partner, we look forward to delivering our Technology-Optimized Platform on its 0.13-micron process," said Adam Kablanian, CEO and president, Virage Logic. "As a single source for fully tested and validated IP, we will be able to help our joint customers achieve high manufacturing yields. Also, by reducing system integration issues and verification times, we will be able to help them to successfully address the dramatic rise in system and silicon costs."
Technology-Optimized Semiconductor IP Platforms
Building on its technology and market leadership position, Virage Logic's Technology-Optimized Platforms aim to meet the critical requirements of reducing silicon costs and failure risks, while boosting performance and ensuring high manufacturing yields for a particular foundry or integrated device manufacturer (IDM) process. By providing silicon-proven, integrated IP that is compatible with all the major EDA flows, Virage Logic's Technology-Optimized Platforms address the needs of complex and mainstream SoC designs.
Virage Logic's Technology-Optimized Platforms are based on its highly differentiated IP including the Self-Test and Repair (STAR) Memory SystemTM the Area, Speed and Power (ASAP) Memory product lineTM the ASAP LogicTM product line with its metal programmable and standard cell libraries; and the recently introduced Base I/O libraries. Technology-Optimized Platforms enable customers to expedite the creation of next-generation products by addressing the increasingly complex task of identifying and obtaining the semiconductor IP needed to produce successful, on-time products. Virage Logic's semiconductor IP platform strategy calls for the delivery of Technology-Optimized Platforms for a broad range of third-party foundry and IDM processes.
About Virage Logic
Virage Logic Corp. (Nasdaq:VIRL) is a leading provider of best-in-class semiconductor IP platforms based on memory, logic, I/Os, and IP development tools that are silicon proven and production ready. Virage Logic meets market demands for cost reduction, while improving performance and reliability for fabless and integrated device manufacturer (IDM) companies focused on the consumer, communications and networking, handheld and portable, and computer and graphics markets. Virage Logic is headquartered in Fremont, California and has sales and support offices worldwide. For more information, visit www.viragelogic.com or call (877) 360-6690 toll free or (510) 360-8000.
Chartered Semiconductor Manufacturing, one of the world's top three dedicated semiconductor foundries, is forging a customized approach to outsourced semiconductor manufacturing by building lasting and collaborative partnerships with its customers. The Company provides flexible and cost-effective manufacturing solutions for customers, enabling the convergence of communications, computing and consumer markets. In Singapore, Chartered operates five fabrication facilities and has a sixth fab, which will be developed as a 300mm facility.
A company with both global presence and perspective, Chartered is traded on both the Nasdaq Stock Market (Nasdaq: CHRT) and on the Singapore Exchange (SGX-ST: CHARTERED). Chartered's 3,500 employees are based at 11 locations around the world. Information about Chartered can be found at www.charteredsemi.com.
SAFE HARBOR STATEMENT FOR VIRAGE LOGIC UNDER THE PRIVATE SECURITIES LITIGATION REFORM ACT OF 1995:
Statements made in this news release other than statements of historical fact are forward-looking statements, including, for example, statements relating to Virage Logic's business outlook, new products and new relationships. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to maintain and develop new relationships with third-party foundries, adoption of technologies by semiconductor companies and increases in the demand for their products, the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies, the company's ability to obtain royalty revenues from customers in addition to license fees, business and economic conditions generally and in the semiconductor industry in particular, competition in the market for embedded memories and other risks including those described in the Company's Annual Report on Form 10-K for the period ended September 30, 2002, filed with the Securities and Exchange Commission (SEC) on December 16, 2002, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic or from the SEC's website (www.sec.gov), and in press releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.
Chartered Safe Harbour Statement under the provisions of the United States Private Securities Litigation Reform Act of 1995
This news release may contain forward-looking statements, as defined in the safe harbour provisions of the U.S. Private Securities Litigation Reform Act of 1995. These forward-looking statements reflect our current views with respect to future events, and are subject to certain risks and uncertainties, which could cause actual results to differ materially from historical results or those anticipated. For example, changes in market outlook and trends; the rate of semiconductor market recovery; economic conditions in the United States as well as globally; customer demands; the performance level of our fabrication facilities; the successful implementation of our alliance and collaboration with Virage Logic; and competition. Although we believe the expectations reflected in such forward-looking statements are based upon reasonable assumptions, we can give no assurance that our expectations will be attained. In addition to the foregoing factors, a description of certain other risks and uncertainties which could cause actual results to differ materially can be found in the section captioned "Risk Factors" in our Annual Report on Form 20-F filed with the U.S. Securities and Exchange Commission. You are cautioned not to place undue reliance on these forward-looking statements, which are based on the current view of management on future events. We undertake no obligation to publicly update or revise any forward-looking statements, whether as a result of new information, future events or otherwise.
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