Spartan-3 FPGAs Provides Customers with the Benefits of Programmability Without the Excessive Conversion or Re-qualification Costs Associated with FPGA-to-ASIC Conversions
SAN JOSE, Calif., June 23, 2003 - Xilinx, Inc. (NASDAQ: XLNX) today announced that its Spartan-3 FPGAs - the world's lowest cost FPGAs built on 90nm process technology and 300mm wafers - offer a lower cost solution than competing FPGA conversions using ASIC technology. Ranging from 50K to 5M system gates, and starting under $3.50*, the Spartan-3 family addresses customer demand for low-cost solutions while offering the benefits of programmability and without the expense of conversion or re-qualification associated with FPGA-to-ASIC conversions. Xilinx attributes the overwhelming success of the Spartan Series line of low cost FPGAs as one of the leading factors for its market dominance. Xilinx is as the number one PLD provider and ranked as the fourth largest ASIC provider in the world, according to Dataquest.
With price points lower than many popular ASIC-based products, Spartan-3 FPGAs deliver the lowest cost without the non-recurring engineering (NRE) charges and engineering effort associated with conversions. Given their low price points and high functionality, Spartan-3 FPGAs are being used for full volume production, allowing reprogrammability from the lab all the way through to product deployment in the field.
"Xilinx is delivering what our customers have been asking for – a low-cost programmable solution with full reprogrammability at prices competitive with ASICs, effectively eliminating the need for hard and risky FPGA-to-ASIC conversions", said Babak Hedayati, Senior Director of Product Solutions Marketing and Partnerships at Xilinx.
Xilinx is the only FPGA vendor shipping products on 90nm or 300mm technology with over a year lead on competitors. Xilinx also announced today that, in response to strong customer demand for Spartan-3 solutions, it has enhanced the smallest member of the family, the XC3S50 device, to include block ram, embedded multipliers, and digital clock manager (DCM) similar to the other Spartan-3 family members.
Spartan-3 – A Robust FPGA Platform With Complete Solutions
Already, Spartan-3 devices are being delivered into the hands of customers. The eight-member Spartan-3 family offers designers a robust, affordable, flexible alternative to traditional custom ASIC designs.
- High Density and Memory: Spartan-3 FPGAs offer an unprecedented density range for Spartan-class devices, ranging from 50K to 5M system gates.
- Up to 784 I/Os with Staggered Pad Technology: Spartan-3 devices are optimized to deliver maximum I/Os on their reduced size die through a dual ring of staggered I/O pads. An innovative approach to traditional process technology challenges, staggered pad technology results in the highest I/Os and gates per dollar, making Spartan-3 ideal for I/O and gate-limited designs.
- Embedded XtremeDSP Functionality: Spartan-3 devices offer embedded DSP capability with unrivaled price points for high performance DSP applications with up to 330 billion multiply and accumulates (MACs) per second. With up to 104 embedded 18-bit multipliers and distributed RAM elements, designers have ultimate flexibility to optimize their designs.
- I/O Standards: Spartan-3 devices support 23 leading parallel I/O standards, both single-ended and differential signaling, with pre-engineered, fully compliant cores including PCI 32/33 and PCI 64/33, as well as other popular parallel connectivity cores for telecommunications and networking.
Pricing and Availability
The new Spartan-3 family consists of eight devices. First customer shipments of new Spartan-3 family began March 2003. The entire Spartan-3 family will be available in volume production in early 2004 from distributors worldwide, or direct from Xilinx at www.xilinx.com/spartan.
Xilinx, Inc. is the worldwide leader of programmable logic and programmable system solutions. Additional information about Xilinx is available at www.xilinx.com.
* volume pricing for 250K units, 2004