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XpressCCIX-AXI Controller IP for PCIe 5.0 with CCIX ESM support
Accelerate JPEG2000 with Barco Silex IP Cores
August 14, 2003 - BARCO SILEX introduces its BA112JPEG2000E and BA111JPEG2000D IP cores targeted at high-speed JPEG2000 encoding and decoding. These cores give access to the wide range of capabilities offered by the JPEG2000 Standard.
Indeed this Standard defines a unified algorithm able to offer a large spectrum of features such as progressive bitstream, precise rate control, region of interest, high-quality joined lossless and lossy compressions. Consequently this rich set of advantages leads JPEG2000 to be an important actor in the compression world. This is not limited to still picture compression. However due to its computational complexity, hardware platforms are required to reach high-speed applications characterized by timings compatible with real-time video encoding. This is made possible with the combination of BARCO SILEX BAxxxJPEG2000E/D cores acting as compression accelerators and FPGA platforms.
For more information about BARCO SILEX IP cores visit www.barco-silex.com and download the Factsheet info under IP design.
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