MILPITAS, Calif. Even as some of the second wave of network processor companies give up the ghost, a third wave is breaking on the beach, built upon the intellectual property of companies with roots in internetworking systems.
Terago Communications Inc. has announced sample availability of a packet-forwarding processor which the company claims is the first in customers' hands to forward packets at wire speed. Terago is led by the founders of Neo Networks Inc., which introduced a StreamProcessor parallel architecture in 1997 to handle both Internet Protocol packets and asynchronous transfer mode cells. The company is opening a West Coast headquarters in Milpitas, Calif., not far from another processor company, Empowertel Networks Inc.
EmpowerTel, a spin-off of Lara Technologies Inc., has shifted its b usiness focus to chip sets for builders of packet-based systems after observing the fallout among startups in the switching business, where it once set its sights. Both Terago and EmpowerTel are entering a crowded and uncertain communication processor field.
NeoNetworks's StreamProcessor architecture won some respect when it was introduced, but got swamped in the tidal wave of core routers and broadband switches that arrived in the late '90s. Terago president and chief executive Hemant Trivedi, the former chief technology officer of NeoNetworks, said venture funders made it clear more than a year ago that the action was turning to standardizing the functions the NeoNetworks team had embedded in multiple ASICs.
The company began with a simulation of separate ingress, egress, and fabric processors, but shifted to a more straightforward packet-forwarder, dubbed the ProTera architecture, for 10-Gbit networks. By relying on full-duplex architecture in its traffic manager, Terago no longer needs separate i ngress and egress processing. The company already has moved into sampling of the proNP 5010 network processor, and will offer its proTM 5020 traffic manager shortly.
Terago has been awarded or is seeking patents in more than 15 areas related to packet management and policing. Its target is to be able to independently police 256,000 independent packet flows. The company has no intention of offering control-plane processors, hoping instead to link its architecture to such co-processors as the Broadcom Corp.'s SiByte design.
Trivedi said Terago is in good shape to weather the current slump, with $30 million in venture funding and established foundry relationships with IBM, NEC, and Taiwan Semiconductor Manufacturing Co. Terago hopes its foundries' sub-0.15-micron capability will allow it to move to 40-Gbit processor support by the end of the year.
At EmpowerTel, the company has spent the three months since it reintroduced itself at Microprocessor Forum acquainting developers with its MediaXpress processors and MediaFlow software. EmpowerTel president and chief executive Ajit Medhekar said his company's USX1000 switch was a de facto testbed that proved the MediaXpress concept. The company has raised more than $70 million, and has retained a staff of more than 60 to retarget designs toward optimized chip sets.
Even when EmpowerTel had a systems mission, the bulk of its talent was silicon-based, said vice president of marketing Roland Soohoo. The company envisioned a world where a single edge switch would access TDM, ATM, and IP services, but the particular mix of interface blades designed by EmpowerTel became all too common. As voice-over-IP systems failed to take off and TDM-based voice systems stayed in separate networks, the demand for such systems tapered off, spurring EmpowerTel to return to its semiconductor roots.
Bane and a blessing
The carrier slump that drove most competitive carriers out of business may make it more difficult to sell processors to a dwindling number o f OEMs, Medhekar said. But at the same time, the dominance of incumbent carriers means that TDM services remain important, and most network processors do not handle TDM well, he said. Thus, the recession has been both a bane and blessing to EmpowerTel.
"Real-time is where we will have an edge, since our architecture offers a media conversion latency of 1 millisecond," Medhekar said. "We also are providing full QoS support for both MPLS and DiffServ, which will make this architecture perfect for mixes of bursty and real-time services."
Both companies realize they must compete not only with the existing roster of communication processor suppliers, but also with an industry still wedded to ASICs and a new generation of communication-oriented FPGAs.
"Look at our own experience developing ASICs at NeoNetworks," Trivedi said. "The biggest battle is not with an Intel or Motorola, but for all the network processor vendors to convince system architects not to use ASICs."