New e Verification Component - eVC - Accelerates Verification of PCI Express-Based Chips
SAN JOSE, Calif.--(BUSINESS WIRE)--Sept. 15, 2003--Verisity Ltd. (Nasdaq:VRST), the leading supplier of verification process automation solutions, today announced the availability of its PCI Express e Verification Component (eVC). The PCI Express eVC dramatically shortens the time needed to create a PCI Express-based verification environment. In addition, the PCI Express eVC is fully compliant with Verisity's e Reuse Methodology (eRM(TM)) to provide users with guaranteed interoperability and reusability.
The PCI Express eVC was developed for functional verification of PCI Express-based systems. It is a ready-made highly configurable eVC suitable for any DUT that interfaces with a PCI Express bus. It contains the entire functional verification environment and includes three integrated components: a scenario generator for generating and injecting both legal an illegal traffic; monitors and assertion checkers for viewing outputs and checking protocol rules; and coverage reports showing the functional coverage of scenarios on the bus. The PCI Express eVC is fully compliant with eRM, a methodology for developing reusable verification components. eRM promotes best practices among developers by providing comprehensive guidelines and best-known methods for developing verification environments and/or eVCs.
"Verification IP has become a strategic asset for our customers," explained Pete Heller, eRM and eVC product line manager for Verisity. "The PCI Express eVC is a very important component for designs employing the PCI Express standard. It provides everything a verification engineer needs to verify these designs including generation, checking and full coverage analysis. In addition, eRM-compliance ensures that the PCI Express eVC will interoperate seamlessly with all other eRM compliant eVCs."
"The industry is moving forward with the transition across platforms to PCI Express," said Bala Cadambi, Intel's PCI Express initiative manager. "PCI Express provides the performance and system design flexibility required for the present and next generation computing and communications platform component interconnects while also providing a long-term path to improved I/O slots. Verification tools help accelerate development of PCI Express enabled products and keep the industry on track for delivery of solutions in 2004."
About the e Reuse Methodology
Today's complex chips commonly incorporate many different protocols, interfaces and processors. To verify these complex designs, engineers need to intermix a variety of e Verification Components (eVCs) within a single verification environment. To ensure that all eVCs plug-and-play and behave consistently, Verisity created the eRM, which defines standards for architecting, coding and packaging eVCs. Since its introduction just over a year ago, eRM has dramatically increased productivity by shortening the development of verification environments and transferring codified application expertise. Over a dozen companies have already adopted eRM and developed over 120 reuseable verification components.
In related announcements, Verisity today announced a companion methodology to eRM, the System Verification Methodology (sVM(TM)). sVM encapsulates comprehensive guidelines and best-known practices for chip and SoC-level verification. sVM was built upon the huge success of eRM and extends the value of a verification methodology to the chip and SoC level (see release "Verisity Simplifies the Adoption of Proven 10x SoC Verification Processes," dated Sept 15, 2003). Verisity also announced eAnalyzer(TM), an intuitive static analysis and methodology tool that simplifies verification environment development using eRM's best-known methods (see related release "Verisity Launches eAnalyzer," dated September 15, 2003).
Pricing and Availability
The PCI Express eVC will be available in Q4 2003. The list price for a single floating, annual license is $10,000.
Verisity, Ltd. (Nasdaq:VRST), is the leading supplier of process automation solutions for the functional verification market. The company addresses customers' critical business issues with its market-leading software and intellectual property (IP) that effectively and efficiently verify the design of electronic systems and complex integrated circuits for the communications, computing, and consumer electronics global markets. Verisity's Specman Elite(R) verification process automation solution automates manual processes and detects critical flaws in hardware designs enabling delivery of the highest quality products and accelerating time to market. The company's strong market presence is driven by its proven technology, methodology, and solid strategic partnerships and programs. Verisity's customer list includes leading companies in all strategic technology sectors. Verisity is a global organization with offices throughout Asia, Europe, and North America. Verisity's principal executive offices are located in Mountain View, California, with its principal research and development offices located in Rosh Ha'ain, Israel. For more information, visit www.verisity.com.
Verisity, the Verisity logo, eAnalyzer, eRM, Specman Elite and sVM are either registered trademarks or trademarks of Verisity Design, Inc. in the United States and/or other jurisdictions. All other trademarks are the property of their respective holders.
SOURCE: Verisity Design, Inc.