GDA Technologies Enhances its PCI Express IP Family by Offering Verification IP Solutions from Avery Design Systems
INTEL DEVELOPER FORUM, San Jose, California – September 16, 2003 – GDA Technologies, Inc., a fast growing supplier of Intellectual Property (IP) and Electronic Design Services (EDS), today announced that it has enhanced its PCI Express IP family by offering PCI-Xactor from Avery Design Systems. PCI-Xactor is a comprehensive PCI Express verification IP solution for Endpoint, Root Complex, Switch and Bridge designs that will be included in GDA’s PCI Express IP core offerings. GPEX, the first PCI Express IP from GDA includes the PCI-Xactor verification solution. The PCI-Xactor is also available as standalone product through GDA.
“GDA’s complete PCI Express IP solutions empower designers to implement exciting and innovative PCI Express-compliant products while significantly reducing design risks and verification time," said Prakash Bare, Vice President of IP Business at GDA Technologies Inc. “Avery’s verification IP forms an important component of our PCI Express offerings. We are pleased to be working with Avery team to provide our PCI Express customers unparallel quality and robustness in verification front.”
“GDA is a proven IP supplier and Avery is pleased to partner with GDA to streamline PCI Express IP implementation for our customers,” said Chris Browy, Vice President of Marketing at Avery Design Systems. “Together the companies will develop an integrated solution addressing PCI Express Endpoint, Root Complex, and Switch/Bridge implementations. Support for wide range of system topologies and PCI protocols enable customers to speed up compliance verification of GDA-based PCI Express designs.”
The GDA PCI Express Endpoint IP core, called GPEX adheres to the PCI Express 1.0a specifications and is available for both ASIC and FPGA implementations. It supports endpoint, bridge, switch and root complex solutions. It includes MAC, data link and transaction layers. GPEX supports PIPE based PHY architecture and provides a flexible packet oriented user logic interface with an optional DMA controller. GPEX Configurable options include number of lanes (up to 16), number of virtual channels (up to 8), maximum payload size (up to 4K Bytes), and transmit retry/receive buffer size. GPEX provides flow control support for both directions and completely handles PCI Express ordering rules.
The PCI-Xactor Verification IP solution provides Verilog-based BFMs, transaction generation and protocol analyzer functions, checklist coverage, and a functional compliance test suite including test coverage. The functional compliance test suite is based on Intel® and PCI SIG test specifications. The Bus Exerciser provides a PCI transaction API for the generation of directed and random bus traffic. The PCI-Xactor Endpoint solution supports multiple root complexes and endpoints BFMs. The PCIXactor Switch/Bridge solution supports a switch BFM and a multi-link protocol analyzer to verification transaction ordering and completion rules. BFMs can be programmed to generate transactions or completions with normal or exceptional behaviors using over 20 different TL/DLL/PHY parameters.
GDA and Avery Design Systems are members of the Intel® Developer Network for PCI Express Architecture and PCISIG.
Price and Availability
For pricing and detailed information on GDA PCI Express IP cores and PCI-Xactor verification IP solutions, please email at ip@gdatech.com.
About GDA Technologies
GDA Technologies Inc. is a leading design services company with high value IP, value added design services and flexible engineering resources for the embedded, networking, and consumer electronics markets. GDA has developed many high performance IP cores for compute, and networking interfaces including HyperTransport, 10 Gigabit Ethernet MAC, and SPI4.2. Moreover, GDA focuses on designing systems, boards, SOCs, ASICs, FPGA's concept to product. It has successfully developed IPs and products in the areas of high speed handheld embedded solutions, digital video applications, Internet appliances, voice and data networking applications and non-form factor PC architectures. GDA is headquartered in San Jose, Calif., and has satellite design centers in Boston, Sacramento, Singapore, Chennai and Bangalore, India. The GDA web site is http://www.gdatech.com.
About Avery Design Systems
Avery Design Systems Inc. is a supplier of intelligent HDL-based functional verification products and service that enables dramatic productivity improvements of the ASIC-based systems and SOC verification process. Our products include TesetWizard transactionbased testbench automation supporting native Verilog and VHDL, SimCluster parallel simulation which speeds simulations up to 10X using existing simulators, and PCI-Xactor Verification solutions for PCI, PCI-X, and PCI Express. Additional information about Avery Design Systems is available at http://www.avery-design.com.
|
GDA Technologies Hot IP
Related News
- Avery Design and GDA Technologies Introduce MaxCov for PCI Express Compliance Verification
- Avery Design Launches PCI Express 6.0 Verification IP to Enable Early Development, Compliance Checking for New Version of Standard
- Astera Labs Verifies Its System-Aware PCI Express 5.0 Smart Retimer Using Avery Design Systems PCIe 5.0 Verification IP
- Avery Design Systems Announces Support for PCI Express 3.0 Verification IP
- CAST Selects Avery Design Systems for PCI Express Verification IP
Breaking News
- Launching MosChip DigitalSky™ for Building Connected Intelligent Enterprises
- Crypto Quantique collaborates with ADLINK to simplify and enhance device security in industrial PCs
- Xiphera Partners with IPro for the Israeli Chip Design Market
- Siemens collaborates with GlobalFoundries to certify Analog FastSPICE for the foundry's high-performance processes
- EXTOLL collaborates with Frontgrade Technologies for High-Speed SerDes IP
Most Popular
- BrainChip Introduces Lowest-Power AI Acceleration Co-Processor
- Launching MosChip DigitalSky™ for Building Connected Intelligent Enterprises
- Siemens collaborates with GlobalFoundries to certify Analog FastSPICE for the foundry's high-performance processes
- RaiderChip brings Meta Llama 3.2 LLM HW acceleration to low cost FPGAs
- Crypto Quantique collaborates with ADLINK to simplify and enhance device security in industrial PCs
E-mail This Article | Printer-Friendly Page |