Program Delivers Complete Solutions, Accelerates Design Time and Improves Manufacturability
FREMONT, Calif., October 8, 2003 — Virage Logic Corporation (Nasdaq:VIRL), a leading provider of best-in-class semiconductor IP platforms, today announced it has broadened and renamed its partner program and has added 16 new members. The Virage Logic IP (VIP) Partner program replaces the Memory Alliance Program (MAP), originally established in March 2001, to better support the needs of Virage Logic’s growing list of semiconductor IP platform customers. Through well-established technology alliances with more than 50 partner companies, Virage Logic’s VIP partners provide complementary solutions that span several different key categories including Design Services, EDA and Test, Foundry, and Intellectual Property (IP).
“Our customers have come to rely on us as a single source provider of silicon-proven IP. By partnering with over 50 enabling technology providers, our mutual customers benefit with access to complete solutions, accelerated design time and improved manufacturability,” said Greer Person, vice president of business development for Virage Logic. “System-on-chip (SoC) design encompasses many decisions and activities beginning with system level conceptual design and ending with the shipment of packaged, tested parts. Our objective is to ensure that our customers move through this process as efficiently and reliably as possible.”
Extensive Partner Program
The VIP Partner program includes the following types of companies, including the following new members: (Please see the attached addendum for a sampling of partner comments on the value of the VIP Partner program.)
Design Services: For customers choosing to augment their design teams or to outsource their entire chip design and production to a Design Services provider, the VIP Partner program ensures the availability of complementary design experts who have experience with Virage Logic IP and understand how to leverage that IP to the customer’s benefit. New VIP Design Services partners Alchip Technologies, Manhattan Routing, Oceanstream, and SiGlobe join existing partners Arcadia Design Systems, Cadence Design Systems, CMOSChips, eSilicon Corporation, Faraday Technology, Flextronics, Infinite Technology, Intrinsix, Mosis, Quantum Think Group (Qthink) and Synopsys Professional Services.
EDA and Test Vendors: By working closely with EDA companies to ensure that their tools work optimally with Virage Logic’s semiconductor IP platforms, we enable customers to take full advantage of the benefits that highly optimized IP provides such as accelerated design time. Close collaboration with design-for-test (DFT) and test houses also improves manufacturability of large-scale designs, enhances flexibility in datapath planning and accelerates physical implementation. New VIP EDA and Test partners AmmoCore, Apache Design, Inovys, Synplicity and Zenasis join existing partners Artest, Cadence Design Systems, Credence, HPL Technologies, InTime Software, Logic Vision, Magma Design, Mentor Graphics, Nassda, Sequence Design, Sonics, and Synopsys, Inc.
Foundries: Virage Logic’s foundry partnerships ensure access to silicon-proven IP on advanced semiconductor processes at competitive prices from multiple sources. New VIP Foundry partners Silterra and SMIC join existing partners Chartered Semiconductor, Tower, TSMC and UMC.
IP Vendors: By working in partnership with other leading IP suppliers to test silicon and provide reference designs, the VIP Partner program enables customers to access the true functionality of the IP prior to committing it to their design. New VIP IP partners ARM, Clearspeed, Denali, Imagination Technologies, and Morpho Technologies join existing partners 3DSP, Improv Systems, MIPS Technologies, QualCore Logic, QuickSilver Technology, Sarnoff, and Tensilica.
VIP Partners to Participate at the FSA Suppliers Expo
Virage Logic will be joined by more than 20 of its VIP partners at the FSA Suppliers Expo being held October 9, 2003, at the San Jose McEnery Convention Center, San Jose, California. Expo attendees will be able to see first hand how the VIP partner offerings complement Virage Logic’s semiconductor IP platforms to provide SoC designers with access to more complete solutions, accelerated design time and improved manufacturability. For further information on the FSA Suppliers Expo, or to register, please visit http://www.fsa.org.
About Virage Logic
Virage Logic Corp. (Nasdaq:VIRL) is a leading provider of best-in-class semiconductor IP platforms based on memory, logic, I/Os, and IP development tools that are silicon-proven and production ready. Virage Logic meets market demands for cost reduction, while improving performance and reliability for fabless and integrated device manufacturer (IDM) companies focused on the consumer, communications and networking, handheld and portable, and graphics markets. Virage Logic is headquartered in Fremont, California and has sales and support offices worldwide. For more information, visit www.viragelogic.com or call (877) 360-6690 toll free or (510) 360-8000.
Virage Logic IP (VIP) Partner Program
Quote Sheet Addendum
Design Services Partners
“Alchip has a growing track record of successful, ‘right-the-first-time’ complex system-on-chip (SoC) silicon designs in North America, Japan and Asia Pacific. Given our growth, the Virage Logic IP (VIP) Partner program proves to be a very valuable strategic engagement. The IP and technical resources available to Alchip through the VIP program enable us to satisfy the requirements of the most demanding fabless and IDM customers,” said Sophia Chou, director of marketing and business development at Alchip Technologies. “We look forward to a mutually beneficial partnership with Virage Logic as we tackle ever more complex SoC designs.”
“eSilicon addresses its customers’ time-to-market requirements by accessing silicon-proven IP from its strategic partner network,” said Hao Nham, vice president of design services at eSilicon Corporation. “Through its VIP Partner program, Virage Logic helps us address the best-in-class foundation IP needs of our customers, such as their memory requirements.”
EDA & Test Partners
Cadence Design Systems
“Silicon design chain collaboration with Virage Logic is critical to ensure that our technology and engineering services customers have a smooth path to silicon success,” said Jan Willis, vice president of strategic third-party programs at Cadence® Design Systems, Inc. “As a member of the Virage Logic IP (VIP) Partner program, our Encounter™ and Incisive™ platforms are verified with Virage Logic’s Technology-Optimized Platforms, speeding customers’ time-to-volume.”
“Our collaboration with Virage Logic started with integration of their semiconductor IP with our complete IC implementation system,” said Michael Ma, vice president of business development at Magma. “Virage Logic now directly ships Magma Volcano database views of their IP, making it easier for our mutual customers to leverage our joint solution. We’re pleased to join Virage Logic’s IP (VIP) Partner program and to continue to work with Virage Logic to help our mutual customers achieve timing closure faster using nanometer technologies.”
“Since semiconductor IP and especially embedded memory has become an essential part of system-on-chip (SoC) design, Nassda supports fast and accurate design and verification of IP in its full-chip environment,” said Graham Bell, senior director of marketing at Nassda. “As a member of Virage Logic’s IP (VIP) Partner program, our joint customers will benefit from more efficient and automated design flows that leverage Virage Logic’s silicon-proven IP and deliver lower power and higher performance designs.”
“Memory and silicon library IP has become an integral part of system-on-chip (SoC) design, and we are helping to ensure that it is easy to support through Synopsys’ GalaxyÔ Design and DiscoveryÔ Verification Platforms,” said Rich Goldman, vice president of strategic market development at Synopsys, Inc. “This collaboration will help our joint customers to experience a smoother, more convergent implementation flow, utilizing Virage Logic’s silicon-proven memory and silicon library IP.”
Chartered Semiconductor Manufacturing
“In anticipation of our customers’ needs to reduce design time and to get designs right the first time, Chartered is collaborating with companies across the semiconductor supply chain, including suppliers of critical design libraries and memory IP where Virage Logic is an acknowledged innovator,” said Kevin Meyer, vice president of worldwide marketing and services at Chartered Semiconductor Manufacturing. “As an integral partner of our design enablement ecosystem, Virage Logic brings its proven track record of providing quality and reliable semiconductor IP to Chartered customers seeking competitive technical solutions from a trusted source. This extends to our NanoAccess Alliance, as Chartered works closely with Virage Logic on providing trusted semiconductor IP on a 90-nanometer (nm) industry process platform that includes standard cell and I/O offerings.”
“Virage Logic has a reputation of being a leading edge silicon IP provider. Our customers have worked with them and have confidence in their solutions. Our partnership with them will help to open up more opportunities for us,” stated Steve Della Rocchetta, executive vice president of worldwide sales and marketing at Silterra.
“SMIC has been pleased with the licensing agreement for Virage Logic’s Technology-Optimized semiconductor IP Platform on SMIC’s advanced 0.18-micron CMOS process. This agreement gives SMIC’s customers access to Virage Logic’s Technology-Optimized Platform for high-volume, high-density and high-performance complex and mainstream system-on-chip (SoC) designs. As one of the leading semiconductor IP companies in the world, Virage Logic’s silicon-proven Technology-Optimized Platform provides SMIC’s customers with reliable and manufacturable IPs, thus reducing risk and shortening the design cycle,” said Sam T. Wang, president of SMIC Americas.
“Tower Semiconductor is focused on providing cost effective solutions for our customers that also optimize their time-to-market,” said Dennis E. Morris, manager of IP and design services at Tower Semiconductor. “By Partnering with Virage Logic, Tower Semiconductor is providing its customers with IP solutions of high quality and reliability meeting Tower’s objectives of fully supporting its customers in effectively bringing their products to market.”
“Virage Logic continues to be a valuable partner for UMC as it has a strong portfolio of embedded memories that target UMC’s advanced process generations," said Ken Liou, director of the design support division at UMC. “This partnership is rewarding to both parties as it strives to meet the increasingly sophisticated requirements of our mutual customers.”
“The industry-standard MIPS architecture is well recognized for its performance leadership within the embedded market,” said Tom Petersen, director of product marketing at MIPS Technologies. “Through partnerships with companies such as Virage Logic, we enable access to best-in-class peripheral IP so that system-on-chip (SoC) designers can optimize their solutions using our core product offerings. We applaud Virage Logic’s expanded partner program and look forward to continuing our relationship.”
“At Sarnoff, our portfolio of IP products targeted at consumer electronics requires efficiency in both area and power consumption,” said William Mayweather III, senior director Silicon Intellectual Property at Sarnoff Corporation. “Virage Logic’s silicon-proven IP allows our customers to achieve efficiency in area and power.”
Safe Harbor Statement under the Private Securities Litigation Reform Act of 1995:
Statements made in this news release, other than statements of historical fact, are forward-looking statements, including, for example, statements relating to trends, business outlook, products, and customer relationships. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic’s ability to forecast its business, including its revenue outlook; Virage Logic’s ability to execute on its strategy to become a provider of semiconductor IP platforms; Virage Logic’s ability to continue to develop new products and maintain and develop new relationships with third-party foundries and integrated device manufacturers; adoption of Virage Logic’s technologies by semiconductor companies and increases in the demand for their products; the company’s ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies; the company’s ability to obtain royalty revenues from customers in addition to license fees, to receive accurate information necessary for calculating royalty revenues and to collect royalty revenues from customers; business and economic conditions generally and in the semiconductor industry in particular; competition in the market for semiconductor IP platforms; and other risks including those described in the company’s Annual Report on Form 10-K for the period ended September 30, 2002, filed with the Securities and Exchange Commission (SEC) on December 16, 2002, and in Virage Logic’s other periodic reports filed with the SEC, all of which are available from Virage Logic or from the SEC’s website (www.sec.gov), and in news releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.
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