Streamlines SoC Integration and Verification
SAN JOSE, CA. - October 20, 2003 - Atrenta® Inc., the Predictive Analysis company™, and Aptix, a leading supplier of pre-silicon prototyping (PSP) tools and platforms for embedded system-on-chip (SoC) design, have partnered to develop a set of RTL coding rules for pre-silicon prototyping that ensure efficient mapping to Aptix's multi-FPGA prototyping platform. The rule-set is made available as the Aptix Policy for Atrenta's SpyGlass® Predictive Analyzer.
Targeted for both design and verification engineers, the Aptix Policy for SpyGlass helps both groups follow best practices and ensure code compliance with design-for-prototyping principles. For designers it provides a comprehensive set of rules around which to efficiently code their RTL for FPGAs. For verification engineers it ensures that they are receiving clean RTL while providing in-depth design information. More of the verification engineer's time can be spent discovering real design bugs as opposed to FPGA incompatibilities. The end result is a streamlined RTL-to-PSP flow, a more efficiently verified and validated SoC, and quicker time to market.
Atrenta worked directly with Aptix to define and test the most critical guidelines relating to the RTL-to-Prototype flow. Using the fast-synthesis and logic evaluation technologies of the SpyGlass platform, the Aptix Policy performs in-depth structural analysis on Verilog and VHDL RTL to flag violations. After running a design through Spyglass, users can use Aptix's Logic Mapping software, Design Pilot™ to map their designs to Aptix's Reconfigurable PSP, System Explorer™, or to any standard PCB platform. Atrenta's first release of the Aptix predictive analysis solution is comprised of a set of rules that relate to FPGA synthesis compliance, successful Prototype versus Simulation comparison, and pertinent design information for verification engineers.
Charlie Miller, Aptix Sr. Vice President of Marketing & Business Development, said, "Aptix has more experience in pre-silicon prototyping than any other company. Part of our expertise is knowing the best way to design for prototyping. This new Aptix Policy for Atrenta's SpyGlass Predictive Analyzer captures that knowledge for use by our mutual customers."
"At Atrenta we are committed to solving our customers design productivity challenges, stated Ghulam Nurie, Atrenta's Sr. Vice President of Marketing & Business Development. "It is our strategy to address our customer's critical design issues as well as optimize their tool flow. By partnering with Aptix, we bring a set of new capabilities to help our mutual customers write pre-silicon prototype ready RTL from the start. This removes late stage RTL changes and enables a smooth transition from simulation to pre-silicon prototyping."
This Aptix policy is available now for use in SpyGlass 3.3 or later. It is sold and supported by Atrenta and its distributors. It runs on Sun/Solaris 2.5 - 2.8, HP-UX 10.2 and RedHat Linux 7.
Aptix Corporation is a leading provider of high-performance pre-silicon prototype (PSP) solutions to System-on-Chip (SoC) developers, enabling them to accelerate their time-to-market, reduce costs and improve their product performance. Aptix's reconfigurable and portable PSPs enable hardware developers to integrate custom logic and to verify and debug complex SoC designs in a real-world environment and software developers to accelerate the firmware and application software development timeline. In addition, these flexible prototypes can be deployed for field-testing and to multiple customers for evaluation, providing a development head start. Visit Aptix on the web at http://www.aptix.com. Aptix is headquartered at 1338 Ridder Park Drive, San Jose, CA 95131.
SpyGlass® uses a unique predictive analysis technique to perform detailed structural analysis on Verilog and VHDL RTL in order to detect complex design problems early in the design cycle, resulting in reduced development costs, lower risk and early time to market. SpyGlass' fast-synthesis engine creates a structural representation of the design allowing the most comprehensive and accurate analysis of RTL to detect problems not normally visible in the RTL. Problems detected include clock domain crossings, synchronization, and timing issues, testability problems, SoC integration requirements, RTL-handoff, design reuse, clock/reset requirements, and coding styles. SpyGlass quickly pinpoints critical problems not generally found until after lengthy simulation and synthesis runs, such as combinational loops, levels of logic and fanout violations, tri-state bus decoding errors, inefficient use of resources and much more.
Atrenta's unique Predictive Analysis technology accelerates the design of SoCs, ASICs and FPGAs by analyzing downstream requirements upfront. Its award-winning SpyGlass® family of predictive analysis products performs detailed structural analysis at design creation stage (Verilog and VHDL RTL) to detect complex design problems that are not easily detected with conventional verification methods. SpyGlass has been widely adopted by more than 50 of the world's leading electronics companies, including eight of the top ten semiconductor companies. Atrenta was chosen by Venture Reporter as one of the top 100 venture-backed companies for 2002.
Atrenta employs over one hundred people worldwide and is headquartered in San Jose, California, with European offices in England and France, a research and development center in India, and sales and support distributors in Central Europe, India, Israel, Japan, Korea, Singapore, Taiwan, and United Kingdom. For further information, visit the Atrenta website at www.atrenta.com, email firstname.lastname@example.org, or call 408-453-3333. To view online demos, visit http://www.atrenta.com/demo.