Commentary: Will your chip design stay here? (By Richard Goering, EE Times)

Will your chip design stay here?
By Richard Goering, EE Times
November 3, 2003 (11:52 a.m. EST)
URL: http://www.eetimes.com/story/OEG20031030S0051

Recently, we've run some articles about expanding chip design activity in China and India. We've also noted that EDA revenue is growing in Asia, but not in North America or Europe. All of that may cause U.S. and European designers to wonder: Are their jobs going to stay at home, or sail away to cheaper locales?

Make no mistake-in today's environment, if a company can get a product to market more cheaply by hiring engineers in Beijing or Bangalore, they will do so. Of course, the product has to be delivered on time and be of adequate quality. But whatever can be profitably outsourced will be, sooner or later.

But, as I found on a trip to India several years ago, it's not as simple as comparing salaries between locations. You can probably find good engineers in India for $10,000 per year, but what about the costs of transportation, communications, management, training and a whole lot of universal power supplies? Also, there aren't any deep-submicron fabs.

China has fabs, but, according to Jordan Selburn, analyst at iSuppli Corp., most Chinese IC designers are still working at 0.35- or 0.5-micron nodes. They're a generation or two behind their American counterparts, who are mostly working at 0.18 or 0.13 micron these days.

I do think that a lot of "commodity" design work-low to mid-complexity ASICs, FPGAs, pc boards-is going overseas, if it hasn't already. More and more, systems and IC houses will turn to lower-cost markets for supplemental design work, but probably not for their leading-edge designs.

So if you're a U.S. or European designer and want to keep your job at home, gravitate toward that "edge" that would be tough to outsource. One possibility is architectural design. Another is IC implementation at 90 or 65 nm, with those difficult timing, power, signal integrity and manufacturability i ssues. Another is mixed-signal or RF design.

Or, if you're designing something less than bleeding edge, find faster and cheaper ways to do it, such as structured ASICs or RTL signoff.

The bottom line is you have competition from people just as smart as you who are, at least for now, willing to work for less. They are doing exactly what they should be doing-bringing their skills into the world. Do what you should be doing, and keep your skills competitive.

Richard Goering is managing editor of Design Automation for EE Times.