Improv moves Jazz DSP core into high-volume 16-bit markets

Improv moves Jazz DSP core into high-volume 16-bit markets
By Semiconductor Business News
June 5, 2001 (12:39 p.m. EST)
URL: http://www.eetimes.com/story/OEG20010605S0032

BEVERLY, Mass. -- Taking aim at a broader range of DSP applications, Improv Systems Inc. here this week rolled out its Jazz 2 digital signal processor technology, using a streamlined 16-bit derivative of its initial 32-bit Jazz 1 architecture launched last year.

"The 32-bit Jazz 1 is for high performance--like a 'DSP dragster'--but the Jazz 2 is being aimed at 80% of the market to serve everything from hearing aids to MP3 players to residential gateways," explained Steven Brightfield, vice president of marketing at Improv.

Like the more powerful 32-bit Jazz 1 processor, the new DSP architecture is aimed at system-on-chip designs and offers a high degree of scalability for multiprocessor ICs, said Brightfield. The architecture uses a non-blocking soft switch, called a "DataCom" block, which eliminates bottlenecks in accessing register files while expanding the overall performance, he said.

But to tailor the new Jazz 2 for higher-volume applications, Improv created a new architecture with a 16-bit data path and streamlined the DSP register transfer language (RTL) code to lower power dissipation as well as increase gate efficiency, Brightfield said. "The low-end implementation is 50,000 gates," he noted.

The company also has added low-power static and dynamic features to the Jazz 2 core, and it improved code density by 50% compared to existing DSPs, said Brightfield. One novel technique used in the Jazz 2 is a compiler than generates a binary image of code, which is then decompressed on-the-fly by the processor when software is fetched from memory. The decompression function requires just a few thousand gates on the processor, but it enables the compiler to dramatically reduce code size and lower memory requirements, Brightfield said.

Improv is also supporting system-on-chip designs that combine the Jazz 2 DSP with reduced instruction set computing (RISC) processors from ARM Ltd. and MIPS Technologies Inc. ARM cores are supported wi th AMBA/AHB bus interfaces while the MIPS PI bus supports MIPS cores.

The Jazz 2 Performer Tool Suite 2.0 hardware/software design environment incorporates an automated processor configuration tool--called Jazz Composer 2. This tool will produce customized Jazz 2 processors within an hour, according to the company. The core and enhancements to the technology will allow designers to target 0.13-micron and below process technologies for clock speed of 200 MHz.

"We have done test chips in 0.2- and 0.15-micron process technologies. We working with partners to create test chips for 0.13-micron processes by the end of this year," Brightfield said. He said the first Jazz 2-based products are expected to be introduced this year as well.

The Beverly company is also offering a set of pre-designed versions of Jazz 2 processors, ranging from a single-MAC (multiply-accumulator) to quad-MAC chips.

The Jazz 2 processor and tool suites are now available. Design seats for standard tool suites begin at less t han $5,000 each. Improv also collects licensing and unit-royalty fees for ICs based on its DSP technology.

--J. Robert Lineback