Faraday Announces Silicon Proven 3G Serial ATA Technology
Serial ATA II PHY and Controller on UMC's 0.18um Process Enables Mass Adoption of Next Generation Storage Interface
Hsinchu Taiwan, December 15, 2003 - Faraday Technology Corporation (TAIEX: 3035), a leading silicon IP and fabless ASIC company, today announced the silicon proven results of its 3G Serial ATA solutions. Based on UMC's 0.18um standard CMOS logic process, Faraday's Serial ATA II PHY test chips not only achieved first pass silicon success, but also exhibited exceptional performance characteristics. Both PHY and Controller IPs are fully compliant with the Serial ATA II standard, which is the extension of the Serial ATA 1.0 specification.
"We are very excited about the test results", said Mr. Sheanyih Chiou, CTO of Faraday Technology. "Proving our design in 0.18um while everybody else is struggling with the challenges of developing Serial ATA solutions on 0.13um, gives our customers tremendous time-to-market and cost advantages".
Serial ATA II technology is gaining popularity, but because of its high analog front end frequency, virtually every vendor implementing it has had to do so in 0.13um process. However, the high overall costs and longer lead times associated with 0.13um process technology prevent Serial ATA II from wide deployment other than in server storage. Faraday has leveraged its world-class mixed-signal design expertise to make this leading edge technology available in 0.18um process for all applications.
Besides process technology selection, several architectural decisions also make Faraday's Serial ATA II solution extremely attractive. By using a tracking architecture, where clock-data recovery (CDR) is not passed over into the digital domain much later, the PHY can respond very quickly to changes in signaling, producing a very low jitter of less than 60 ps. Also, by avoiding the use of programmable processors, the entire digital design is a mere 25,000 gates including buffers. This makes Faraday's Serial ATA II controller one of the smallest in the world.
Faraday is the first company delivering both Serial ATA II PHY (Physical Layer) and Controller (Link & Transport Layer) IP solutions. To speed up customer's system development process, Faraday also offers its customers the evaluation board with both Serial ATA II PHY and controller IPs on it.
"We are seeing rapid adoption of Serial ATA technologies by leading chipset and motherboard vendors," said Mr. Frank Lin, Sales Vice President of Faraday Technology. "Our successful silicon proven result on UMC 0.18um process opens up opportunities for our customers to move into all segments of storage applications, down to portable consumer devices."
Availability:
Faraday's 0.18um Serial ATA II PHY and Controller IPs are available for verification and licensing now. The 0.13um version of Faraday 3G-SATA PHY IP will also be available in 2004. The North American price for single usage license of 0.18um Serial ATA II PHY is $425,000 USD. A certain amount of the license fee will be included in the NRE fee for ASIC customers.
About Faraday Technology Corporation:
Faraday is a leading silicon IP and fabless ASIC vendor. The company's broad IP portfolio includes 32-bit RISC CPUs, DSPs, PHY/Controllers for USB 2.0, Ethernet, and Serial ATA. With more than 500 employees and 2002 revenue of 96.2 million, Faraday is the largest fabless ASIC company in all Asia-Pacific. Headquartered in Taiwan, Faraday has service and support branch offices around the world, including the U.S., Japan, Europe, and China. For more information, please visit: http://www.faraday-usa.com
|
Faraday Technology Corp. Hot IP
Related News
- Faraday Announces Its Silicon Proven & Seamless Integrated MIPI CSI-2, DSI Controller & PHY IPs
- Faraday Launches Silicon-Proven DDR2 Memory Physical Interface IP
- SNOWBUSH Announces Silicon-Proven SerDes IP in TSMC 65nm G+ Process for PCI Express, SATA & Other Serial Standards
- New Serial ATA Host Controller from Silicon Image Enables eSATA Connectivity for PC and CE Applications
- Faraday Delivers Silicon-Proven Structured ASIC Chips with ARM Architecture CPU, USB, Ethernet, and Wireless Connectivity
Breaking News
- Arteris Wins Two Gold and One Silver Stevie® Awards in the 2025 American Business Awards®
- Faraday Adds QuickLogic eFPGA to FlashKit‑22RRAM SoC for IoT Edge
- Xylon Introduces Xylon ISP Studio
- Crypto Quantique announces QRoot Lite - a lightweight and configurable root-of-trust IP for resource-constrained IoT devices
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
Most Popular
- Andes Technology and Imagination Technologies Showcase Android 15 on High-Performance RISC-V Based Platform
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- Synopsys and TSMC Usher In Angstrom-Scale Designs with Certified EDA Flows on Advanced TSMC A16 and N2P Processes
- Certus Semiconductor Joins TSMC IP Alliance Program to Enhance Custom I/O and ESD Solutions
- M31 Collaborates with TSMC to Advance 2nm eUSB2 IP Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |