BOPS Signs SynTest as a TopStar Authorized Design Center for DFT
BOPS Signs SynTest as a TopStar Authorized Design Center for DFT
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--May 29, 2001--BOPS, Inc., the leading provider of programmable broadband digital signal processing (DSP) intellectual property, today announced that it has signed SynTest Technologies (Sunnyvale, Calif.) as a member of its TopStar(SM) Authorized Design Center Program. The program provides comprehensive system-on-chip (SOC) design services and solutions for BOPS customers. SynTest offers Design-For-Test (DFT) tools and services.
``We are selecting the leading providers of service for our customers. SynTest is a leader in DFT tools and services, and has already engaged with us to provide scan and memory BIST services to our DSP core customers,'' said Zafar Malik, vice president, SOC design services, BOPS, Inc.
``Our goals are to improve the testability of IC and SoC designs and reduce tester time,'' noted SynTest's president and CEO, L.-T. Wang. ``Relationships with leading core providers such as BOPS benefits our customers and helps them reduce test time.''
TopStar is a key part of BOPS overall customer support plan to provide best-in-class design and support services to its customers through a combination of expert in-house and a network of highly regarded external resources. BOPS customers are free to choose the right combination of resources based on their own service requirements and preferences. For more information about the program, visit http://www.bops.com/fw/adc/.
About BOPS
Based in Mountain View, Calif., BOPS, Inc. develops and licenses a fully scalable, synthesizable DSP architecture that is programmable and reusable for evolving communications, mobile multimedia and wireless applications. BOPS DSP architecture, cores, compilers, system tools and complete SOC designs offer total life-cycle solutions and rapid time-to-market. While providing the highest performance in the industry, BOPS® cores are DSP co-processors to ARM, MIPS and other hosts and are supported by an extensive alliance of hardware, software, tools and design partners. For more information, please visit http://www.bops.com.
About SynTest
SynTest Technologies, Inc. develops and markets DFT and fault simulation software tools and offers consulting services throughout the world to semiconductor companies, ASIC designers and test groups. The company's products improve an electronic design's testability and fault coverage and result in reduced defect levels and reduced tester time. For more information, please visit www.syntest.com.
Note to Editors: BOPS is a registered trademark and TopStar is a service mark of BOPS, Inc. All other brands or product names are the property of their respective holders.
Contact:
BOPS, Inc., Mountain View Anita Giani, 650/254-2815 anita.giani@bops.com or ValleyPR for SynTest Georgia Marszalek, 650/345-7477 georgia@valleypr.com
Related News
- Tensilica Signs RacyICs as New Authorized Design Center Partner for IC Design
- Fraunhofer IIS Becomes Tensilica Authorized Design Center Partner
- KPIT Cummins becomes Authorized Tensilica System-on-Chip (SoC) Design Center
- UpZide Becomes Tensilica Authorized Software Design Center; Offers Expertise in VDSL2, LTE, UWB and Baseband Chip Design
- MegaChips Becomes Tensilica Authorized Design Center
Breaking News
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
- Controversial former Arm China CEO founds RISC-V chip startup
- Fundamental Inventions Enable the Best PPA and Most Portable eFPGA/DSP/SDR/AI IP for Adaptable SoCs
- Cadence and TSMC Collaborate on Wide-Ranging Innovations to Transform System and Semiconductor Design
- Numem at the Design & Reuse IP SoC Silicon Valley 2024
Most Popular
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Qualitas Semiconductor Appoints HSRP as its Distributor for the China Markets
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
E-mail This Article | Printer-Friendly Page |