Highest-Density Stratix Devices with Over 79,000 LEs Now Deliver Digital Signal Processing as Fast as 333 MHz and Data Rates in Excess of 300 MHz
San Jose, Calif., January 21, 2004 — Altera Corporation (NASDAQ: ALTR) today announced that the two largest members of the Stratix™ FPGA family are available in faster speed grades. With 79,040 and 57,120 logic elements (LEs) respectively, the EP1S80 and EP1S60 members of the Stratix device family are now available in the -5 speed grade to deliver the same high-performance digital signal processing (DSP) speeds (333 MHz) and data rates (300 MHz) attained with the smaller Stratix devices. These newly available versions, which are on average 12 percent faster, are ideal for logic-intensive applications such as image processing, which require both high-density and high-performance devices. They are also excellent design vehicles for HardCopy Stratix™ devices, Altera’s low-risk approach to structured ASIC design.
“We plan to use these new high-speed devices to implement our JPEG and JPEG2000 cores targeting video applications, which require both high density and exceptional performance,” said Thierry Watteyne, Barco Silex’s general manager. “These new devices from Altera offer us unsurpassed levels of functionality that will enable us, in turn, to offer our customers new levels of system performance.”
Versions of Altera’s EP1S60 and EP1S80 FPGAs have been shipping for over a year. The newly characterized EP1S60F1020C5 and EP1S80F1020C5 Stratix devices provide up to 22 DSP blocks, which consist of hardware multipliers (up to 176), adders/subtractors, accumulators, and pipeline registers. With speeds of up to 333 MHz, these embedded arithmetic units free up valuable logic resources for other functionality implementations, while also enabling faster device performance.
“Our ability to offer these extremely dense, high-speed Stratix devices in volume demonstrates the continuing success we have had with our 0.13-micron, all-copper process technology in attaining both high yields and optimal device performance,” said Paul Ekas, Altera’s senior product marketing manager for FPGA products. “Our customers can now leverage that success to design new capabilities into their systems.”
The new Stratix speed grade options are supported in the Quartus® II software and all major third-party synthesis and simulation tools available today for implementing performance critical designs. The complete solution for these devices includes board-level simulation tools and Stratix device-optimized intellectual property (IP), offering designers unparalleled capabilities to design, test, and optimize complex, high-speed designs.
Pricing and Availability
Both the Stratix EP1S60F1020C5 and EP1S80F1020C5 devices are now available. Pricing for EP1S60F1020C5 devices begins at $380 for 10,000 unit volumes and at $660 in 5,000 unit volumes for EP1S80F1020C5 devices in the second half of 2004.
About the Stratix Device Family
The Stratix device family is the industry’s first family of production-qualified FPGAs built on a 0.13-micron, all-layer copper process and the winner of EDN magazine’s 2002 Digital IC Innovation Award. Featuring embedded DSP blocks, embedded RAM blocks, and support for leading-edge and emerging I/O standards, Stratix devices give designers the performance and densities they need to meet the challenges of high-bandwidth system design. For more information about the Stratix device family, visit www.altera.com/stratix.
Altera Corporation (NASDAQ: ALTR) is the world’s pioneer in system-on-a-programmable-chip (SOPC) solutions. Combining programmable logic technology with software tools, intellectual property, and technical services, Altera provides high-value programmable solutions to approximately 14,000 customers worldwide. More information is available at www.altera.com