eInfochips broadens it's verification offerings with new eVC that incorporates eRM™ and is compliant to the Coverage Driven Methodology (CDV).
Santa Clara, CA - January 19, 2004 - eInfochips Inc., a member of the OCP-IP (Open Cores Protocol International Partnership) today announced the availability of its OCP eVC. The eVC can be used for functional verification of any OCP 2.0 compliant Master and/or Slave device in IP cores, SoC designs, etc. It works with all HDL simulators that are supported by Specman Elite®.
The eVC has independent Master and Slave architectures and can simulate single or multiple OCP Masters and/or Slaves in a verification environment. It can be configured for monitoring & reporting protocol violations and provides extensive functional coverage. Configurable error generation allows testing of error detection mechanisms under realistic scenarios. The eVC supports verification of DUTs written in Verilog, VHDL or SystemC and conforms to the Coverage Driven Verification (CDV) methodology leading to minimum number of test cases with maximum functional coverage.
"We see an increasing number of OCP compliant products that simplify the task of OCP interconnect verification," said Ian Mackintosh, president OCP-IP. "The eInfochips announcement of important OCP 2.0 compatible products is further illustration of OCP-IP's thriving infrastructure and a further testament to the widespread adoption we are seeing throughout the industry. We are pleased with the quality work eInfochips has done in this area."
The deliverables include a fully verified OCP eVC with documentation and a complete test suite with comprehensive sequence library. Support includes product updates plus around-the-clock engineering support from eInfochips for integrating the eVC with the test environment. The eVC is available from eInfochips, get in touch with them directly for more information.
About eInfochips Inc.
eInfochips Inc., based in Santa Clara, is a leading provider of cutting edge ASIC design services, Embedded systems solutions and IP cores. The capabilities extend from Specification to Silicon, with knowledge spanning design entry, automated verification methodologies using HVL, eVC development, SystemC & PLI, physical layout & implementation and board design. The company's India and US design centers have delivered SoC and Embedded solutions to a variety of customers thus increasing their cost-effectiveness, reducing their time-to-market and growing their market strength. A partial list of customers includes Intel, Broadcom, TI, LSI Logic, Cisco, Sun Microsystems, Philips.
For more information, please visit www.einfochips.com