Low Latency & size Interlaken core for ASIC or FPGA, up to 1,000Gbps, 32 lanes, 112G/lane
Actel, LogicVision develop embedded test for programmable gate array cores
![]() |
Actel, LogicVision develop embedded test for programmable gate array cores
By Semiconductor Business News
May 21, 2001 (11:51 a.m. EST)
URL: http://www.eetimes.com/story/OEG20010521S0044
SUNNYVALE, Calif. -- Programmable logic supplier Actel Corp. today announced a partnership with LogicVision Inc. to embed reusable test intellectual property in system-on-chip (SoC) designs. The two Silicon Valley companies said they will collaborate to offer self-test solutions for Actel's new VariCore embedded programmable gate array cores, called "EPGA." The partnership aims to solve the growing problems in designing and testing SoC products, said the two companies. "The challenge is not only to efficiently test these cores once they have been embedded into the SoC design, but to have the ability to re-use this test capability throughout the design, manufacturing and system deployment phases of the SoC product life," said Rodger Sykes, vice president of marketing and business development at LogicVision in San Jose. "Clearly, advantages can be gained by having the ability to reuse test to validate cores after remote and in-field reprogram ming." Actel's VariCore EPGA logic functions are based on 0.18-micron SRAM technology. The cores were introduced in February to support reprogrammable "soft hardware" embedded in SoC designs, said Actel. "Partnering with LogicVision will help assure that all elements of the customer's post-design test flow are reliably integrated, making an important contribution to our goal of providing a complete development solution," said Yankin Tanurhan, senior director of embedded FPGA at Actel in Sunnyvale.
Related News
- MorningCore Technology Licenses Flex Logix's Embedded Field-Programmable Gate Array on TSMC's 12FFC Process
- Boeing Defense, Space & Security Licenses Flex Logix's Embedded Field-Programmable Gate Array on GlobalFoundries 14nm Process
- Dialog Semiconductor and Flex Logix Establish Strategic Partnership for Mixed Signal Embedded Field-Programmable Gate Arrays (eFPGA)
- LogicVision Extends Built-In Self-Test Products to be Directly Controllable From Embedded CPU Cores, Easing System Test and Maintenance
- LogicVision's Embedded SerDes Test Selected by PLX Technology for Gen 2 PCI Express Device Family
Breaking News
- eInfochips Wins Design Services Company of the Year Award from IESA
- Samsung Foundry Certifies Analog FastSPICE Platform from Siemens for Early Design Starts on 3nm GAA Process Technology
- Silvaco Acquires Physical Verification Solution Provider POLYTEDA CLOUD LLC
- Arasan announces its Total eMMC IP solution for TSMC 22nm process
- MediaTek Launches 6nm Dimensity 1200 Flagship 5G SoC with Unrivaled AI and Multimedia for Powerful 5G Experiences
Most Popular
- Cadence to Acquire NUMECA to Expand System Analysis Capabilities with Computational Fluid Dynamics
- Arasan announces its Total eMMC IP solution for TSMC 22nm process
- Dual Mode Bluetooth v5.2 SW Link Layer, Protocol Stack SW, Profiles licensed for ultra-low power 22nm True Wireless (TWS) Earbuds SoC
- Industry R&D Spending To Rise 4% After Hitting Record in 2020
- Silvaco Acquires Physical Verification Solution Provider POLYTEDA CLOUD LLC
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |