ST product managers freed to outsource chip making
![]() |
ST product managers freed to outsource chip making
By Peter Clarke, Silicon Strategies
February 6, 2004 (2:34 a.m. EST)
URL: http://www.eetimes.com/story/OEG20040205S0014
LONDON Pasquale Pistorio, chief executive officer of STMicroelectronics, has instructed product line managers that they can have chips manufactured outside the organization if it can be done more cost effectively. The move is intended to make sure ST's manufacturing operations remain globally competitive, although a theoretical "open market" in manufacturing can sometimes produce anomalies, according to Jim Nicholas, R&D design director for ST's DVD division. "The CEO has passed a message that we can go outside, if internal fabs are not competitive," Nicholas said, speaking at a London press conference organized by Cadence Design Systems Inc. Economic incentives are being offered to chip makers to design with 90-nm process technologies because fabs and foundries have invested in the capability. They also want design groups to migrate to fabs and foundries. Nicholas said he saw little immediate need to go to 90-nm process technol ogy as progress could be made at the 130-nm process technology node more easily through improved architectures and by adding features through software programmability. "I am reticent about being in 90-nm, but the plant people are starting to make it look a lot more attractive," said Nicholas.
Related News
- Doteck Integrates intoPIX JPEG XS for High-Performance ST 2110 8K & 4K Encoding
- Matrox Video and intoPIX Expand Interoperable IPMX & ST 2110 Solutions with JPEG XS Innovation at NAB 2025
- SEALSQ RISC-V Chips Adoption is Predicted to Get AI Boost Making it a Viable Competitor to Traditional GPUs
- Synopsys plus Ansys: The making of an EDA giant?
- ST Engineering Acquires D'Crypt to Strengthen its Cyber Capabilities
Breaking News
- PQSecure Partners with Menta SAS to Demonstrate Leakage-Resistant PQC IPs on eFPGA Fabric
- VESA Releases Compliance Test Specification Model for DisplayPort Automotive Extensions Standard
- Imagination Announces E-Series: A New Era of On-Device AI and Graphics
- Kyocera Licenses Quadric's Chimera GPNPU AI Processor IP
- MIPI C-PHY v3.0 Adds New Encoding Option to Support Next Generation of Image Sensor Applications
Most Popular
- Numem Appoints Former Intel Executives to Leadership Team
- MIPI C-PHY v3.0 Adds New Encoding Option to Support Next Generation of Image Sensor Applications
- Agile Analog appoints CEO to drive growth
- Axiomise Featured Gold Sponsor at RISC-V Summit Europe Next Week in Paris
- Cadence Accelerates Physical AI Applications with Tensilica NeuroEdge 130 AI Co-Processor
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |