Paris, France and Mountain View, California, February 9, 2004
– TransEDA, a leader in coverage and ready-to-use verification solutions for electronic designs, and Verisity Ltd. (Nasdaq:VRST), the leading supplier of Verification Process Automation (VPA) solutions, today jointly announced the availability of a flow in which TransEDA’s Reqtify specification coverage technology is interfaced to Verisity’s vManager verification management solution, linking design specification requirements to verification. The link between Reqtify and vManager brings the same best practices widely used by engineers in the Automobile, Aeronautics and Defense industries to the Semiconductor industry.
"The interface between vManager and Reqtify addresses an important area of verification management by tying the project verification execution to the design requirements", said Dave Tokic, Director of Strategic Marketing for Verisity. "We recognize how important high-level management processes are to our customers, and by linking these solutions, we’re able to automate the processes of both solutions, and bring about increased productivity, quality and predictability."
Development teams need to ensure that all specification requirements have been verified in the final design. With today’s systems becoming more complex, the need for requirements traceability and impact analysis during the design phase becomes crucial in order to enable quality development in SoC design. The interface between TransEDA’s Reqtify and Verisity’s vManager allows designers to boost the quality and time-to-market of SoC designs. Designers can verify that the design meets the initial specifications and replies to the needs of the customers.
The integrated process automates the measurement of coverage of requirements in the functional verification process. The esign requirements are defined in the user’s preferred language and are captured by Reqtify in a specifications document. Designers then simply select the specifications document, the verification plan and the vManager files, to be automatically linked by Reqtify.
Through the interface, designers can immediately detect if there are simulations which cover each requirement and if any untested requirements remain. In addition, Reqtify links to the vManager reports, enabling the user to view and analyse the verification results for each requirement. Analysis results are carefully documented to create user-defined project reports.
"Our users want to deliver a quality product on time. Our user’s customers care most about how well a product meets their needs. Linking Reqtify to Verisity’s vManager enables our users to focus the verification effort on their customers’ requirements," said Jean-Luc Bouvresse, TransEDA President and C.E.O. "The combination of Verisity’s vManager and TransEDA’s Reqtify enables users to focus the verification effort on their customers’ requirements and to efficiently manage the impact of changes during the design cycle".
TransEDA’s Reqtify is a language-independent specification coverage tool that monitors the implementation of specification requirements and effectively manages the impact of changes in the requirements on the design throughout the product development cycle. Reqtify enables verification engineers and SoC designers to focus the verification effort on the customers’ requirements and manage the impact of specification changes, speeding up the verification process and boosting the quality and time-to-market of SoC designs.
Reqtify automatically detects and captures the formalized requirements written in any language and provides user-specific filtering making the information easy to interpret. The tool effectively manages upstream and downstream coverage relations between models, code and other project files, and very easily analyses the impact of changes in the code or models. Requirement changes, updates and deletions are tracked throughout the entire system-level design cycle, and the corresponding user-configurable documentation is automatically generated.
Reqtify simplifies and enables specification coverage and impact analysis. The technology can be easily integrated into existing design flows, even when the design has already started. Moreover, Reqtify is easy to customize, user-friendly and robust. It is interfaced with a large set of text/code editors and design and test tools, and can be deployed at both corporate and project level.
TransEDA’s Reqtify has already been deployed by major companies in Aeronautics and Defense and Automobile industries. These customers have consistently found that the return on investment begins with the first report generation early in the design project, while they gain huge advantages in productivity, team work and customer confidence. The technology has been introduced in the EDA market, to bring Semiconductor designers the same best practices as those already used on numerous large-scale safety-critical development projects, where specification coverage is required by corporate and certification processes.
As design, system size and complexity continues to grow, the task of achieving functional verification closure gets exponentially more difficult. Verisity's vManager is an automated management system that guides the verification process and analyzes verification data to achieve verification closure and optimal resource utilization.
vManager automates the deployment of simulation runs, analyzes failures and coverage data and controls the steps towards closure. vManager automates the tasks that require intensive human interaction, custom tool development or tasks that were simply impossible to achieve.
With Verisity’s vManager, verification teams get predictable verification closure of highly distributed multi-level verification projects and optimal resource utilization. vManager enables project teams to deploy a metric-driven process based on Coverage-Driven Verification (CDV). vManager starts from an executable specification of functional requirements, a verification plan and coverage goals. It then filters and analyzes the data, annotates and correlates the results against verification runs and displays various views of progress towards closure. In addition, vManager provides features important to geographically dispersed teams for organizing block- and system-level simulation suites, managing volumes of data and making rapid decisions using advanced analyses engines and reporting mechanisms.
The vManager interface is available now and can be ordered with version 2.0 of Reqtify.
Verisity Ltd. (NASDAQ: VRST), is the leading supplier of process automation solutions for the functional verification market. The Company addresses customers’ critical business issues with its market-leading software and intellectual property (IP) that effectively and efficiently verify the design of electronic systems and complex integrated circuits for the communications, computing, and consumer electronics global markets. Verisity’s VPA solutions enable projects to move from executable verification plans to module, unit, and chip/system level 'total coverage' and verification closure, while maximizing productivity, product quality and predictability of schedules. The Company’s strong market presence is driven by its proven technology, methodology and solid strategic partnerships and programs. Verisity’s customer list includes leading companies in all strategic technology sectors.
Verisity is a global organization with offices throughout Asia, Europe, and North America. Verisity’s principal executive offices are located in Mountain View, California, with its principal research and development offices located in Rosh Ha'ain, Israel. For more information, visit www.verisity.com.
Verisity, the Verisity logo and vManager are either registered trademarks or trademarks of Verisity Design, Inc. in the United States and/or other jurisdictions. All other trademarks are the property of their respective holders. TransEDA is a registered trademark of TransEDA Technology Ltd. Reqtify is a registered trademark of TNI SA. All other trademarks are the property of their respective holders.