Actel Corp. is advancing its FPGA technology to the next level by hard coding high-speed communications interfaces into the programmable chips.
Calling the approach BridgeFPGA, the company aims to ease transitions to emerging protocols by allowing pre-standard chips to work together. Dennis Kish, vice president of marketing at the Sunnyvale, Calif., company, said the move is a natural evolution of programmable logic.
"Today most of our customers use us for interfaces like PCI and Sonet," he said. But as bandwidth needs increase, "it will be difficult to implement with a full FPGA solution. Having highly optimized ASIC logic in there is the real leverage point for us."
Placing fixed functions inside an FPGA, as opposed to the more common soft IP, will significantly reduce die area and power consumption and increase the chip's performance, he said.
Actel plans to apply the Bridge-FPGA blocks across its FPGA portfolio, which currently incl udes antifuse and flash architectures.
The BridgeFPGAs also complement Actel's SRAM-based VariCore embeddable FPGA -- a reverse approach that enables customizing of standard chips, according to the company. Both are intended to accelerate the uptake of new I/O standards over a range of applications.
To avoid having to support dozens of mask sets for the myriad interfaces, Actel has grouped the BridgeFPGA devices into three basic configurations supporting parallel-to-parallel, parallel-to-serial, and serial-to-serial links. The embedded blocks will contain user-selectable bits to enable specific protocols on either end of the link.
Communications interfaces consume a sizable share of PLDs sold, according to Bryan Lewis, an analyst at Dataquest Inc., San Jose. "It's a smart place for Actel to put their energy," he said.
"Clearly there is an issue of I/Os out there; the competition has realized it too. But Actel is putting a focus on it, and not spreading too thin over a lot of areas."
Whil e rivals propose to embed microprocessors and DSPs, as well as protocol-specific blocks, Actel is for now keeping a "laser-beam focus" on solving the interface problem, according to John East, president and chief executive.
"The market is starting to segment, and we're trying to pick one or two segments where we can really be successful," East said.
The company plans to license physical-layer and protocol controller IP. An alliance with Tality Corp. is expected to yield a 3.125Gbit/s LVDS serdes in the first half of 2002, and other technologies for optical networking, LAN and SAN, and consumer-level products.
Actel hopes to work closely with standard-chip suppliers to provide reference designs, though no partners are yet announced. Initial BridgeFPGA products, which are slated for release in the second half of the year, will support 622Mbit/s LVDS- and HSTL-based standards such as CSIX, Infiniband, and RapidIO.